Rapid thermal oxidation of silicon nanowires

Abstract

Oxidation kinetics of silicon nanowires (SiNWs) subjected to rapid thermal oxidation (RTO) at 900 °C and 1000 °C in dry oxygen for exposure times ranging from 1 to 7.5 min is reported. For 1 min, SiNWs exhibit an enhanced oxidation rate compared to planar silicon, but for longer exposures the oxidation rates of SiNWs and planar Si are similar. Compared to furnace oxidation of SiNWs, RTO provides faster average oxidation rates and a weaker dependence of oxide shell thickness on the NW diameter. Our results demonstrate that RTO is an efficient approach for controlled oxidation of SiNWs.

Realization of high performance silicon nanowire based solar cells with large size

“…For solar cell fabrication, all the wafers were subjected to phosphorus diffusion using oxychloride (POCl 3 ) as the dopant source at 850 • C to form a p-n junction, resulting in a sheet resistance of around 75 /sq. We have divided the wafers into four series according to different passivation methods (as shown in figure 1): series A (bare SiNWs without any [24] have demonstrated that the effectiveness of SiO 2 passivation is insensitive to its thickness in the range of 6-75 nm on silicon wafers, and Krylyuk et al [25] have reported that ∼6 nm thickness of SiO 2 is sufficient for the Si nanowire device performance. Also, 60-70 nm SiN x layer thickness has been widely employed in the current mass production of Si solar cells with effective passivation and good anti-reflection.…”

Reactive molecular dynamics simulations on SiO2-coated ultra-small Si-nanowires

“…1 For these and other applications to occur, obtaining an accurate control over the oxidation process is critical, which, however, is difficult to achieve. 6 This requires a fundamental understanding of the oxidation mechanism of such small Si-NWs, which may be signicantly different from the existing mechanisms for micrometer sized Si-NWs. 7,8 In microelectronics, self-limiting oxidation of Si nanowires and spheres at the micrometer scale is of considerable concern, for instance for the design of metal-oxide-semiconductor (MOS) devices, 2,[8][9][10][11][12][13][14] such as wrap-gated 15 and top-gated 9 FETs or photovoltaic cells.…”

“…11 According to the Kao model, 8 compressive stresses normal to the Si|SiO 2 interface reduce the interfacial reaction rate compared to a planar Si surface, whereas tensile stresses generated within the oxide shell reduce the effective oxide viscosity and enhance the oxygen diffusivity and solubility. 6 However, such stress behavior may change in the oxidation of Si-NWs at the nanoscale, as the shape of the nanowire changes accordingly from circular to polygonal with increasing curvature. Thus, stress results at the nanoscale may disagree with the conclusions for Si-NW oxidation at the microscale due to this "curvature effect".…”

Thermal oxidation and facet‐formation mechanisms of Si nanowires

“…The dark fringes along the Si NW visible in the TEM image of Fig. 2c are attributed to bending 21. The thickness of the SiO 2 shell is 24 nm after 60 min, 45 nm after 120 min and 41 nm following a 180 min oxidation.…”