Rapid Simulation of Photonic Integrated Circuits Using Verilog-A Compact Models

Shawon, Jubayer; Saxena, Vishal

doi:10.1109/tcsi.2020.2983303

Cited by 29 publications

(18 citation statements)

References 27 publications

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“…The filter tuning algorithm (Algorithm 5) starts off with the user specifying the desired filter specifications. The APD filter synthesis algorithm [17,24] translates these user-defined specifications (filter type, order, bandwidth, center frequency, out-of-band suppression) to filter parameters (𝑘 𝑛 , 𝜙 𝑛 & 𝜙 𝑞, 𝑝𝑠 ) for all rings and MZI arms. Then the ccoeff(𝑛, 𝜆 𝑐 , 𝑘 𝑛 ) routine from Algorithm 2 is invoked and desired coupling coefficients for all ring couplers are configured by setting the microheater voltages of the ring tunable couplers to 𝑣 * 𝑛,𝑐 .…”

Section: Automatic Tuning Of Filtersmentioning

confidence: 99%

Fully Automatic In-Situ Reconfiguration of RF Photonic Filters in a CMOS-Compatible Silicon Photonic Process

Shawon¹,

Saxena²

2022

Preprint

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Automatic reconfiguration of optical filters is the key to novel flexible RF photonic receivers and Software Defined Radios (SDRs). Although silicon photonics (SiP) is a promising technology platform to realize such receivers, process variations and lack of in-situ tuning capability limits the adoption of SiP filters in widely-tunable RF photonic receivers. To address this issue, this work presents a first 'in-situ' automatic reconfiguration algorithm and demonstrates a software configurable integrated optical filter that can be reconfigured on-the-fly based on user specifications. The presented reconfiguration scheme avoids the use of expensive and bulky equipment such as Optical Vector Network Analyzer (OVNA), does not use simulation data for reconfiguration, reduces the total number of thermo-optic tuning elements required and eliminates several time consuming configuration steps as in the prior art. This makes this filter ideal in a real world scenario where user specifies the filter center frequency, bandwidth, required rejection & filter type (Butterworth, Chebyshev, etc.) and the filter is automatically configured regardless of process, voltage & temperature (PVT) variations. We fabricated our design in AIM Photonics' Active SiP process and have demonstrated our reconfiguration algorithm for a second-order filter with 3dB bandwidth of 3 GHz, 2.2 dB insertion loss and >30 dB out-of-band rejection using only two reference laser wavelength settings. Since the filter photonic integrated circuit (PIC) is fabricated using a CMOS-compatible SiP foundry, the design is manufacturable with repeatable and scalable performance suited for its integration with electronics to realize complex chip-scale RF photonic systems.

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Section: Automatic Tuning Of Filtersmentioning

confidence: 99%

Fully Automatic In-Situ Reconfiguration of RF Photonic Filters in a CMOS-Compatible Silicon Photonic Process

Shawon¹,

Saxena²

2022

Preprint

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“…Typically, accurate process design kits (PDK) including transistor models are required for integrated circuit (IC) design. Similarly, compact photonic device models are also helpful for large-scale PIC design [54]. Active photonic device models with electrical and optical dynamics can strongly benefit the design of high-speed transceiver circuits [55][56][57][58][59][60][61][62][63][64][65].…”

Section: Introductionmentioning

confidence: 99%

High-speed Si-Ge avalanche photodiodes

Wang

2022

PhotoniX

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High-speed optical interconnects of data centers and high performance computers (HPC) have become the rapid development direction in the field of optical communication owing to the explosive growth of market demand. Currently, optical interconnect systems are moving towards higher capacity and integration. High-sensitivity receivers with avalanche photodiodes (APDs) are paid more attention due to the capability to enhance gain bandwidth. The impact ionization coefficient ratio is one crucial parameter for avalanche photodiode optimization, which significantly affects the excess noise and the gain bandwidth product (GBP). The development of silicon-germanium (Si-Ge) APDs are promising thanks to the low impact ionization coefficient ratio of silicon, the simple structure, and the CMOS compatible process. Separate absorption charge multiplication (SACM) structures are typically adopted in Si-Ge APDs to achieve high bandwidth and low noise. This paper reviews design and optimization in high-speed Si-Ge APDs, including advanced APD structures, APD modeling and APD receivers.

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“…In electronics, compact models have already reached a significant degree of maturity and computational efficiency over the last few decades. To enable design of high-speed integrated communication technologies, the photonics community has also started to develop compact models for optoelectronic devices, in order to unify electrical, photonic, and electromagnetic modeling using the same existing software design tools [5][6][7]. It is important to note that a scalable compact model offers two-fold benefit.…”

Section: Introductionmentioning

confidence: 99%

Multiscale Compact Modelling of UTC-Photodiodes Enabling Monolithic Terahertz Communication Systems Design

et al. 2021

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Due to the continuous increase in data traffic, it is becoming imperative to develop communication systems capable of meeting the throughput requirements. Monolithic Opto-Electronic Integrated Circuits (OEICs) are ideal candidates to meet these demands. With that in mind, we propose a compact and computationally efficient model for Uni-Traveling Carrier Photodiodes (UTC-PDs) which are a key component of OEICs because of their high bandwidth and RF output power. The developed compact model is compatible with existing SPICE design software, enabling the design of beyond 5G and terahertz (THz) communication circuits and systems. By introducing detailed physical equations describing, in particular, the dark current, the intrinsic series resistance, and the junction capacitance, the model accurately captures the physical characteristics of the UTC-PD. The model parameter extraction follows a scalable extraction methodology derived from that of the bipolar and CMOS technologies. A detailed description of the de-embedding process is presented. Excellent agreement between the compact model and measurements has been achieved, showing model versatility across various technologies and scalability over several geometries.

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Rapid Simulation of Photonic Integrated Circuits Using Verilog-A Compact Models

Cited by 29 publications

References 27 publications

Fully Automatic In-Situ Reconfiguration of RF Photonic Filters in a CMOS-Compatible Silicon Photonic Process

Fully Automatic In-Situ Reconfiguration of RF Photonic Filters in a CMOS-Compatible Silicon Photonic Process

High-speed Si-Ge avalanche photodiodes

Multiscale Compact Modelling of UTC-Photodiodes Enabling Monolithic Terahertz Communication Systems Design

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