Rapid prototyping tools for FPGA designs: RapidSmith

Lavin, Christopher; Padilla, Marc; Lundrigan, Philip; Nelson, Brent; Hutchings, Brad

doi:10.1109/fpt.2010.5681429

Cited by 42 publications

(19 citation statements)

References 4 publications

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“…The bitstream is generated in this step and the FPGA can be programmed. The knowledge about component layout allows us to use the RapidSmith [20] tool for analysing the design. This tool is able to generate a list of the bitstream bits that correspond to the identified areas of the FPGA, while we know what components are in each area.…”

Section: Evaluation Of Reliability By Fault Injectionmentioning

confidence: 99%

The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-Mechanical Applications

Podivinsky

Cekan

Šimková

et al. 2014

2014 17th Euromicro Conference on Digital System Design

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The aim of this paper is to present a new platform for estimating the fault-tolerance quality of electro-mechanical applications based on FPGAs. We demonstrate one working example of such EM application that was evaluated using our platform: the mechanical robot and its electronic controller in an FPGA. Different building blocks of the electronic robot controller allow to model different effects of faults on the whole mission of the robot (searching a path in a maze). In the experiments, the mechanical robot is simulated in the simulation environment, where the effects of faults injected into its controller can be seen. In this way, it is possible to differentiate between the fault that causes the failure of the system and the fault that only decreases the performance. Further extensions of the platform focus on the interconnection of the platform with the functional verification environment working directly in FPGA that allows automation and speed-up of checking the correctness of the system after the injection of faults.

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Section: Evaluation Of Reliability By Fault Injectionmentioning

confidence: 99%

The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-Mechanical Applications

Podivinsky

Cekan

Šimková

et al. 2014

2014 17th Euromicro Conference on Digital System Design

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“…This is implemented in Java based on the RapidSmith Java framework [33]. The output is a set of XDL (Xilinx Design Language) files which are used to generate bitstreams for the TCs (see fig.…”

Section: Methodsmentioning

confidence: 99%

Transparent structural online test for reconfigurable systems

Abdelfattah

Bauer

Braun

et al. 2012

2012 IEEE 18th International on-Line Testing Symposium (IOLTS)

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FPGA-based reconfigurable systems allow the online adaptation to dynamically changing runtime requirements. However, the reliability of modern FPGAs is threatened by latent defects and aging effects. Hence, it is mandatory to ensure the reliable operation of the FPGA's reconfigurable fabric. This can be achieved by periodic or on-demand online testing. In this paper, a system-integrated, transparent structural online test method for runtime reconfigurable systems is proposed. The required tests are scheduled like functional workloads, and thorough optimizations of the test overhead reduce the performance impact. The proposed scheme has been implemented on a reconfigurable system. The results demonstrate that thorough testing of the reconfigurable fabric can be achieved at negligible performance impact on the application. Preprint General Copyright NoticeThis article may be used for research, teaching and private study purposes. Any substantial or systematic reproduction, re-distribution, re-selling, loan or sub-licensing, systematic supply or distribution in any form to anyone is expressly forbidden. This is the author's "personal copy" of the final, accepted version of the paper published by IEEE. Abstract-FPGA-based reconfigurable systems allow the online adaptation to dynamically changing runtime requirements. However, the reliability of modern FPGAs is threatened by latent defects and aging effects. Hence, it is mandatory to ensure the reliable operation of the FPGA's reconfigurable fabric. This can be achieved by periodic or on-demand online testing.In this paper, a system-integrated, transparent structural online test method for runtime reconfigurable systems is proposed. The required tests are scheduled like functional workloads, and thorough optimizations of the test overhead reduce the performance impact. The proposed scheme has been implemented on a reconfigurable system. The results demonstrate that thorough testing of the reconfigurable fabric can be achieved at negligible performance impact on the application.

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“…Since XDL files can be converted to and from Xilinx's proprietary NCD physical netlist format, RapidSmith allows indirect access to the physical netlist of a design. As demonstrated in [31], RapidSmith can be used to analyze and create designs and design tools targeted towards Xilinx FPGAs.…”

Section: Rapidsmithmentioning

confidence: 99%

“…RapidSmith provides a software API allowing users to read, write, and manipulate XDL files [31]. Since XDL files can be converted to and from Xilinx's proprietary NCD physical netlist format, RapidSmith allows indirect access to the physical netlist of a design.…”

Section: Rapidsmithmentioning

confidence: 99%

“…One major criticism of OpenPR is the performance of the FPGA Editor router it uses to route the static design and the partial modules. exciting new projects such as RapidSmith [31] , Torc [30], and of course OpenPR. By engaging the community in tool development, it is hoped that open-source FPGA development tools as a whole will reach the point where they can rival and force innovation from their proprietary…”

Section: Future Workmentioning

confidence: 99%

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OpenPR: An Open-Source Partial-Reconfiguration Toolkit for Xilinx FPGAs

Sohanghpurwala

Athanas

Frangieh

et al. 2011

2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and PHD Forum

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The Xilinx Partial Reconfiguration tool kits have been instrumental for performing a wide variety of research on Xilinx FPGAs. These tool kits provide a methodology for creating rectangular partial reconfiguration modules that can be swapped in and out of a static baseline design with one or more PR slots. This thesis presents a new PR toolkit called OpenPR that, for starters, provides similar functionality to the Xilinx PR tool kits. The distinguishing feature of this toolkit is that it is being released as open source, and is intended to be customizable to the needs of researchers. OpenPR has been designed to be easy to use, extensible, portable, and compatible with a wide range of Xilinx software and devices.Aside from supporting the slot-based PR paradigm, OpenPR also provides a solid base for further research into partial reconfiguration and FPGA productivity oriented design tools.

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Rapid prototyping tools for FPGA designs: RapidSmith

Cited by 42 publications

References 4 publications

The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-Mechanical Applications

The Evaluation Platform for Testing Fault-Tolerance Methodologies in Electro-Mechanical Applications

Transparent structural online test for reconfigurable systems

OpenPR: An Open-Source Partial-Reconfiguration Toolkit for Xilinx FPGAs

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