Rank Logic Is Dead, Long Live Rank Logic!

Grädel, Erich; Pakusa, Wied

doi:10.1017/jsl.2018.33

Cited by 16 publications

(44 citation statements)

References 18 publications

(62 reference statements)

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“…The first translation, of FPR to uniform families of FO+rk formulas was given in the work of Dawar et al [5] and used there to establish arity lower bounds. However, this was for a weaker version of the rank logic rather than the strictly more expressive one defined by Grädel and Pakusa [11]. The fact that we can complete the cycle of equivalences with the more powerful logic demonstrates that the definition of Grädel and Pakusa is the "right" formulation of FPR.…”

Section: Fpr Uniform Families Of Boundedwidth Fo+rk Formulasmentioning

confidence: 98%

“…The first, introduced in the work of Dawar [5], is defined in a similar manner as earlier but includes a separate rank operator for each prime rather than a single operator that takes in a prime as a parameter. This logic was shown to be strictly contained in P [11]. The rank logic we have defined here is strictly more expressive and is the focus of current research.…”

Section: Fixed Point With Rankmentioning

confidence: 99%

“…The rank logic we have defined here is strictly more expressive and is the focus of current research. For more details on the syntax and semantics of FPR, see the work of Grädel and Pakusa [11].…”

Section: Fixed Point With Rankmentioning

confidence: 99%

“…At the same time, they make the logic rich enough to express many of the known examples that separate FPC from P. Rank logics were first introduced in the work of Dawar et al [5]. The version of FPR we consider here is that defined by Grädel and Pakusa [11], where the prime characteristic is a parameter to the rank operator, and we do not have a distinct operator for each prime number. Formal definitions of these logics are given in Section 2.…”

Section: Introductionmentioning

confidence: 99%

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Symmetric Circuits for Rank Logic

Dawar

Wilsenach

2021

ACM Trans. Comput. Logic

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Fixed-point logic with rank (FPR) is an extension of fixed-point logic with counting (FPC) with operators for computing the rank of a matrix over a finit field. The expressive power of FPR properly extends that of FPC and is contained in P, but it is not known if that containment is proper. We give a circuit characterization for FPR in terms of families of symmetric circuits with rank gates, along the lines of that for FPC given by Anderson and Dawar in 2017. This requires the development of a broad framework of circuits in which the individual gates compute functions that are not symmetric (i.e., invariant under all permutations of their inputs). This framework also necessitates the development of novel techniques to prove the equivalence of circuits and logic. Both the framework and the techniques are of greater generality than the main result.

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Section: Fpr Uniform Families Of Boundedwidth Fo+rk Formulasmentioning

confidence: 98%

Section: Fixed Point With Rankmentioning

confidence: 99%

Section: Fixed Point With Rankmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Symmetric Circuits for Rank Logic

Dawar

Wilsenach

2021

ACM Trans. Comput. Logic

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“…In general, the expressive power of FP is limited as it fails to express simple counting properties of finite structures such as even cardinality. However, the combination of a mechanism for iteration and a mechanism for counting provided by fixed-point logic with counting (FPC) is strong enough to express most known algorithmic techniques leading to polynomial-time procedures [21,27]. In fact, all known decision problems for finite structures that provably separate FPC from polynomial time are at least as hard as deciding solvability of linear equation systems over a fixed non-trivial finite Abelian group.…”

Section: Introductionmentioning

confidence: 99%

Discrete Temporal Constraint Satisfaction Problems

Bodirsky

Martin

Mottet

2018

J. ACM

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Finite-domain constraint satisfaction problems are either solvable by Datalog, or not even expressible in fixed-point logic with counting. The border between the two regimes coincides with an important dichotomy in universal algebra; in particular, the border can be described by a strong height-one Maltsev condition. For infinite-domain CSPs the situation is more complicated even if the template structure of the CSP is model-theoretically tame. We prove that there is no Maltsev condition that characterises Datalog already for the CSPs of first-order reducts of (Q; <); such CSPs are called temporal CSPs and are of fundamental importance in infinite-domain constraint satisfaction. Our main result is a complete classification of temporal CSPs that can be solved in Datalog, and that can be solved in fixed point logic (with or without counting); the classification shows that many of the equivalent conditions in the finite fail to capture expressibility in any of these formalisms already for temporal CSPs.

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Limitations of the invertible-map equivalences

Dawar

Grädel

Lichter

2022

Journal of Logic and Computation

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This note draws conclusions that arise by combining two recent papers, by Anuj Dawar, Erich Grädel and Wied Pakusa, published at ICALP 2019, and by Moritz Lichter, published at LICS 2021. In both papers, the main technical results rely on the combinatorial and algebraic analysis of the invertible-map equivalences ${\equiv ^{\text {IM}}_{k, Q}}$ on certain variants of Cai–Fürer–Immerman structures (CFI-structures for short). These ${\equiv ^{\text {IM}}_{k, Q}}$-equivalences, for a natural number $k$ and a set of primes $Q$, refine the well-known Weisfeiler–Leman equivalences used in algorithms for graph isomorphism. The intuition is that two graphs $G{\equiv ^{\text {IM}}_{k, Q}}H$ cannot be distinguished by iterative refinements of equivalences on $k$-tuples defined via linear operators on vector spaces over fields of characteristic $p \in Q$. In the first paper it has been shown, using considerable algebraic machinery, that for a prime $q \notin Q$, the ${\equiv ^{\text {IM}}_{k, Q}}$ equivalences are not strong enough to distinguish between non-isomorphic CFI-structures over the field $\mathbb {F}_q$. In the second paper, a similar but not identical construction for CFI-structures over the rings $\mathbb {Z}_{2^i}$ has, again by rather involved combinatorial and algebraic arguments, been shown to be indistinguishable with respect to ${\equiv ^{\text {IM}}_{k, \{2\}}}$. Together with an earlier work on rank logic, this second result suffices to separate rank logic from polynomial time. We show here that the two approaches can be unified to prove that CFI-structures over the rings $\mathbb {Z}_{2^i}$ are in fact indistinguishable with respect to ${\equiv ^{\text {IM}}_{k, {\mathbb {P}}}}$, for the set ${\mathbb {P}}$ of all primes. In particular, this implies the following two results. First, there is no fixed $k$ such that the invertible-map equivalence ${\equiv ^{\text {IM}}_{k, {\mathbb {P}}}}$ coincides with isomorphism on all finite graphs. Second, no extension of fixed-point logic by linear-algebraic operators over fields can capture polynomial time.

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Rank Logic Is Dead, Long Live Rank Logic!

Cited by 16 publications

References 18 publications

Symmetric Circuits for Rank Logic

Symmetric Circuits for Rank Logic

Discrete Temporal Constraint Satisfaction Problems

Limitations of the invertible-map equivalences

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