Random soft error suppression by stoichiometric engineering: CMOS compatible and reliable 1Mb HfO&lt;inf&gt;2&lt;/inf&gt;-ReRAM with 2 extra masks for embedded IoT systems

Ho, ChiaHua; Shen, Tien‐Lin; Hsu, Ping-Yu; Chang, Shuo-Che; Wen, Song; Lin, Meng-Hung; Wang, P. K.; Liao, Shao-Chi; Chou, C. S.; Peng, Kang; Wu, Chau-Neng; Chang, Wen Hsiung; Chen, Y. H.; Chen, F.; Lin, Lieh-Chiu; Tsai, Tzung-Kuen; Lim, S. F.; Yang, Chyan; Shieh, Ming−Shan; Liao, Hsiu-Han; Lin, Chu‐Hsing; Pai, Pradeep; Chan, T.Y.; Chiao, Y. C.

doi:10.1109/vlsit.2016.7573366

Cited by 5 publications

(3 citation statements)

References 2 publications

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“…We show the published cell size for all technologies discussed above in figure 1(c), i.e. SRAM [46][47][48][49][50][51][52][53], eDRAM [54][55][56][57][58][59], eFlash [60][61][62][63][64][65][66][67], DRAM [41,68], eReRAM [69][70][71][72][73], STT-MRAM [42,[74][75][76][77][78][79][80][81][82][83][84][85][86][87]. Note that the SRAM cell sizes down to 7 nm are from literature while the cell sizes (F 2 ) for 3 and 5 nm are linear extrapolation based on the cell sizes from 22 nm to 7 nm.…”

Section: Scaling Analysismentioning

confidence: 99%

Voltage-controlled magnetic tunnel junctions with synthetic ferromagnet free layer sandwiched by asymmetric double MgO barriers

Grèzes

Wong

et al. 2019

J. Phys. D: Appl. Phys.

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Memory and computing applications utilizing voltage-controlled magnetic random-access memory (MRAM) require perpendicular magnetic tunnel junctions (pMTJs) capable of high thermal stability and large write efficiency at advanced technology nodes. We first discuss the scaling requirements for voltage-controlled MRAM to replace various existing memory applications at an advanced CMOS technology node, including cell size, thermal stability, interfacial perpendicular magnetic anisotropy (PMA), and voltage-controlled magnetic anisotropy (VCMA). For replacing volatile memories including SRAM, eDRAM, and DRAM, we employ the retention relaxation technique along with a DRAM-style refresh scheme in the analysis. To enhance both PMA and VCMA at scaled nodes, we explore pMTJs with asymmetric double MgO barriers sandwiching a synthetic ferromagnet (SyF) free layer. In a thin MgO/SyF free layer/thick MgO/fixed layer MTJ stack, the SyF free layer is realized in various ways: single layer (X = Ta, W, Mo, Ir) and bilayers (X = Ta/W, Mo/Ir) of heavy metals insertions in CoFeB/X/CoFeB and Co2FeAl/X/Co2FeAl structures, and multiple insertions in [CoFeB/X]n/CoFeB structures for n = 1–4. A VCMA coefficient of 36 fJ (V m)−1 is achieved in a MgO/CoFeB/Ta/CoFeB/MgO-based MTJ which is comparable to that of the single MgO barrier MTJ. We find PMA enhancement, although with VCMA reduction for an increasing number n of [CoFeB/X]n repetitions. In addition, we demonstrate large TMR of 78%, large interfacial PMA of 1.45 mJ m−2, and VCMA of 65 fJ (V m)−1 in a MgO/Co2FeAl/W/Co2FeAl/MgO-based MTJ annealed above 400 °C.

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Section: Scaling Analysismentioning

confidence: 99%

Voltage-controlled magnetic tunnel junctions with synthetic ferromagnet free layer sandwiched by asymmetric double MgO barriers

Grèzes

Wong

et al. 2019

J. Phys. D: Appl. Phys.

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“…Among different types of NVMs, RRAM has shown great potential in the in-memory applications due to its merits such as nanometers cell dimension [18,28,29], nanoseconds switching speed [19,30,31], and microampere of read-write current with a low operation voltage [20,32,33]. Furthermore, it has a high OFF/ON resistance ratio [17,34,35] and good reliability, including data retention and cycle endurance [21,36,37]. Therefore, RRAM is chosen for this design to implement an 8-bit radix-4 non-volatile logic.…”

Section: Resistive Non-volatile Memorymentioning

confidence: 99%

“…We chose the RRAM in our multiplier design due to its potential in computation application utilizing smaller cell dimension, faster-switching speed, low I/V demands for read-write operation, and high OFF/ON resistance ratio [17]. In addition, it has higher reliability, data retention, and cycle endurance [18][19][20][21]. These characteristics make it a superior option for in-memory computing.…”

Section: Introductionmentioning

confidence: 99%

An 8-bit Radix-4 Non-Volatile Parallel Multiplier

Zhu

Huang

et al. 2021

Electronics

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The data movement between the processing and storage units has been one of the most critical issues in modern computer systems. The emerging Resistive Random Access Memory (RRAM) technology has drawn tremendous attention due to its non-volatile ability and the potential in computation application. These properties make them a perfect choice for application in modern computing systems. In this paper, an 8-bit radix-4 non-volatile parallel multiplier is proposed, with improved computational capabilities. The corresponding booth encoding scheme, read-out circuit, simplified Wallace tree, and Manchester carry chain are presented, which help to short the delay of the proposed multiplier. While the presence of RRAM save computational time and overall power as multiplicand is stored beforehand. The area of the proposed non-volatile multiplier is reduced with improved computing speed. The proposed multiplier has an area of 785.2 μm2 with Generic Processing Design Kit 45 nm process. The simulation results show that the proposed multiplier structure has a low computing power at 161.19 μW and a short delay of 0.83 ns with 1.2 V supply voltage. Comparative analyses are performed to demonstrate the effectiveness of the proposed multiplier design. Compared with conventional booth multipliers, the proposed multiplier structure reduces the energy and delay by more than 70% and 19%, respectively.

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A Hybrid-Grained Remapping Defense Scheme Against Hard Failures for Row-Column-NVM

Jing

Mao

et al. 2022

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Random soft error suppression by stoichiometric engineering: CMOS compatible and reliable 1Mb HfO<inf>2</inf>-ReRAM with 2 extra masks for embedded IoT systems

Cited by 5 publications

References 2 publications

Voltage-controlled magnetic tunnel junctions with synthetic ferromagnet free layer sandwiched by asymmetric double MgO barriers

Voltage-controlled magnetic tunnel junctions with synthetic ferromagnet free layer sandwiched by asymmetric double MgO barriers

An 8-bit Radix-4 Non-Volatile Parallel Multiplier

A Hybrid-Grained Remapping Defense Scheme Against Hard Failures for Row-Column-NVM

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