IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05)
DOI: 10.1109/isvlsi.2005.60
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RAMS: A VHDL-AMS Code Refactoring Tool Supporting High Level Analog Synthesis

Abstract: In this paper, a code refactoring methodology for the high-level analog synthesis is presented. It restructures, refines, and simplifies an analog behavioral model written in VHDL-AMS. Through code refactoring one improves the comprehensibility, expandability and reusability of the behavioral model and brings the model to a necessary preliminary stage for the actual circuit synthesis. This approach supports the top-down hierarchical design flow for analog and mixed-signal application.

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