This paper presents an automatic structure synthe-of analog models due to obvious similarities between the sis technique by partitioning the system representation, which software engineering and the hierarchical top-down design consists of interconnected analog and mixed-signal behavioral flow. In this context, refactoring of analog model means to models coded in VHDL-AMS. The proposed model code refining methodology restructures, refines, and simplifies behavioral mod-modify a model descraption synthesis-oriented wlthout changels by means of code transformations of given abstract models. ing the envisaged behavior of the system model, so that The fundamental approach for these transforms is code refactor-an implementable description for the next-level synthesis is ingan approach taken from software engineering and adjusted reached by iterative application of a sequence of refactoring to the requirements of analog circuit synthesis. Through code methods. That is, part of the model is rewritten in order to refactoring one improves the comprehensibility, expandability, . . and reusability of a behavioral block model and restructures the mprove ertat qualities such as areadablityh extemnsibaietyo model such that subsequent circuit synthesis steps may produce reusability, or synthesability, making the system easier to adequate structural representations of the intended behavior. change, less error-prone and most important more synthesis-Application examples demonstrate the feasibility of this novel oriented.