A computational system based on a synchronous feedback neural network for the on-line event processing of a photon counting intensified CCD detector is presented. The hardware prototype, implemented by means of FPGA technology, consists of 5x5 and is a b k to identify photon events against spurious and/or noise events. It shows a high level of flexiliility, which is essential in the characterization phase of the detector. It allows to implement different kinds of neurons, that is having different output functions and internal architectures, and to run actual, as well as virtual, networks of neurons.