R3TOS: A Novel Reliable Reconfigurable Real-Time Operating System for Highly Adaptive, Efficient, and Dependable Computing on FPGAs

Iturbe, Xabier; Benkrid, Khaled; Hong, Chuan; Ebrahim, Ali; Torrego, Raúl; Martinez, Imanol; Arslan, Tughrul; Pérez, Jon

doi:10.1109/tc.2013.79

Cited by 45 publications

(14 citation statements)

References 24 publications

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“…Reusability of the resource and calculation transiency is the basis of R3TOS. The finest chip granularity as a resource of R3TOS lets a system gain control in implementing high-level behavioral functionality as structured by system designer [17], [18]. R3TOS provides a concrete background to application to perform maximum at runtime and highly flexible into dynamically reconfigurable FPGAs.…”

Section: A Submission Of the Papermentioning

confidence: 99%

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Dolphin Echolocation Based Generation of Application Definite Noc Custom Topology

Poornima*¹,

Santhi²,

Seetharaman³

2019

IJRTE

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 Abstract: Invention of new electronic devices in this technology driven-world has been setting a new scale for faster reach in terms of utilization and communication. The imperfection in the System on Chip (SoC) lead to an innovation of Network on Chip (NoC) that elucidates the communication defects and thereby set a new path for the researchers to enhance the network connectivity. Nature is an inspiration for most of the technologies invented by the researchers. In this paper, we have dealt the existing physical flows and future difficulties with Reliable Reconfigurable Real-Time Operating System (R3TOS) as a software interface with NoC with the proposed customized topology of Transmission Rate based Topology Design using Dolphin Echolocation (TRTD-DE) algorithm. Echolocation is biological scanning system that used by dolphins for movement and chasing the prey. The above ability along with Data flow pipelining (DFP) constructs the customized topology that process the parallel flow of data in order with the availability of the input data. The topology effectively increases the performance due to the clustering phenomena. The algorithm greatly reduces the latency period which is the significant of the topology and increases the throughput. The objectives of the research in the reduction of transmission rate and energy utilization are tested with different multimedia benchmark applications. The transmission ratereduced to average of 41.39% while average of energy consumption reduced to 31.9%.

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Section: A Submission Of the Papermentioning

confidence: 99%

“…R3TOS provides a concrete background to application to perform maximum at runtime and highly flexible into dynamically reconfigurable FPGAs. R3TOS acts an operating system for the execution of hardware tasks with accessible FPGA portions [17].…”

Section: A Submission Of the Papermentioning

confidence: 99%

Dolphin Echolocation Based Generation of Application Definite Noc Custom Topology

Poornima*¹,

Santhi²,

Seetharaman³

2019

IJRTE

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“…As the early ROS, OS4RS were developed by IMEC [3]. It is mainly applied in multimedia, while little relevant design information about OS4RS is available.…”

Section: Related Workmentioning

confidence: 99%

A Linux-based Dynamic Partial Reconfiguration System Applied on Xilinx Zynq

Dongming¹,

Pan²,

Wang³

2017

Proceedings of the 7th International Conference on Computer Engineering and Networks — PoS(CENet2017)

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Dynamic Partial Reconfiguration(DPR) optimizes the resource utilization in the Field Programmable Gate Array(FPGA) over time and space nowadays. But the lack of standard tools and interface makes the extensive application of DPR rather difficult . With the open source Linux widely used in the Xilinx Zynq, users' demand for the reconfiguration becomes urgent. Linux-based dynamic partial reconfiguration system(LDPRS), combining the unified multi-thread programming model of software tasks and hardware tasks with FPGA dynamic partial reconfiguration, provides reliable and perfect reconfiguration system services. LDPRS supplies Linux standard reconfiguration programming interface and service of dynamic loading bitstreams. In the experiment, reconfiguration system is applied in the reconfigurable computing and the results show that FPGA reconfiguration design based on LDPRS has a short development period and high flexibility, supporting the dynamic loading bitstreams. This system efficiently solves the problem of the lack of standard reconfiguration development tools under LINUX, increasing the development flexibility of reconfiguration design and decreasing the difficulty and time in development.

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“…Most of the circuit relocation systems present in the literature still demand that identical location(s) must exist on chip before any form of circuit relocation is possible [5] [7] [8] [9] [10]. They address only direct bitstream placement and relocation and do not provide any means of relocating circuits to non-identical locations.…”

Section: Introduction and Related Workmentioning

confidence: 99%

A Functionality-Based Runtime Relocation System for Circuits on Heterogeneous FPGAs

Enemali

Adetomi

Seetharaman

et al. 2018

IEEE Trans. Circuits Syst. II

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Abstract-Runtime Relocation of circuits on FPGAs have beenproposed for achieving many desirable features including fault tolerance, defragmentation and system load balancing. However, the changes in the architectural composition of FPGAs has made relocation more challenging mainly because FPGAs have become more heterogeneous. Previous and state-of-the-art circuit relocation systems on FPGAs have relied only on direct bitstream relocation which requires the source and destination resource layouts to be the same, as well as access to the design bitstream for manipulation. Hence, their efficiency on modern heterogeneous chips greatly reduces, and mostly cannot be applied to encrypted bitstreams of intellectual property (IP) blocks. In this paper, we present a circuit relocator which augments direct bitstream relocation with a functionalitybased relocation scheme. We demonstrate the feasibility of the proposed technique using a CORDIC application and show that an average of over 2.6-fold increase in number of relocations can be obtained compared to only direct bitstream relocation at expense of a small memory overhead and manageable relocation time for this case study.

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R3TOS: A Novel Reliable Reconfigurable Real-Time Operating System for Highly Adaptive, Efficient, and Dependable Computing on FPGAs

Cited by 45 publications

References 24 publications

Dolphin Echolocation Based Generation of Application Definite Noc Custom Topology

Dolphin Echolocation Based Generation of Application Definite Noc Custom Topology

A Linux-based Dynamic Partial Reconfiguration System Applied on Xilinx Zynq

A Functionality-Based Runtime Relocation System for Circuits on Heterogeneous FPGAs

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