2016
DOI: 10.1109/tpel.2016.2514979
|View full text |Cite
|
Sign up to set email alerts
|

Quasi-Z-Source Inverter With a T-Type Converter in Normal and Failure Mode

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
16
0

Year Published

2017
2017
2022
2022

Publication Types

Select...
8

Relationship

0
8

Authors

Journals

citations
Cited by 103 publications
(16 citation statements)
references
References 39 publications
0
16
0
Order By: Relevance
“…In this topology, the input current is continuous and voltage stress on capacitors is reduced, significantly. To inherit the outstanding advantages of MIs, a combination of the qZS network with 3L-T 2 I was discussed in [2,[19][20][21][22][23][24][25]. These studies connected two identical qZS networks in cascade form to produce a three-level voltage at the output terminal.…”
Section: Introductionmentioning
confidence: 99%
“…In this topology, the input current is continuous and voltage stress on capacitors is reduced, significantly. To inherit the outstanding advantages of MIs, a combination of the qZS network with 3L-T 2 I was discussed in [2,[19][20][21][22][23][24][25]. These studies connected two identical qZS networks in cascade form to produce a three-level voltage at the output terminal.…”
Section: Introductionmentioning
confidence: 99%
“…This phenomenon can destroy switching devices used in the inverter, as well as cause a short circuit at input power supply [13]. This issue can be addressed by incorporating deadtime with a control signal fed to the inverter switching devices [13,14]. However, the effectiveness of the converter is not guaranteed, since it causes the distortion of an output waveform [11][12][13][14][15].The Z-source (ZS) inverter topology, known as a single-stage power converter with a buck-boost capability and ST immune, is proposed in [16] to overcome the limitation of traditional MLIs.…”
mentioning
confidence: 99%
“…This issue can be addressed by incorporating deadtime with a control signal fed to the inverter switching devices [13,14]. However, the effectiveness of the converter is not guaranteed, since it causes the distortion of an output waveform [11][12][13][14][15].The Z-source (ZS) inverter topology, known as a single-stage power converter with a buck-boost capability and ST immune, is proposed in [16] to overcome the limitation of traditional MLIs. By adding the intermediate impedance network between the input power supply and inverter leg, the DC-link of the inverter is boost to the desired value instead of using an additional DC-DC converter before the inverter leg.…”
mentioning
confidence: 99%
See 1 more Smart Citation
“…This paper proved that a higher efficiency and a better distribution of switching losses among the switches was achievable. Reference [14] presented the association of two symmetrical quasi-Z-source networks with a T-type inverter that could operate both under regular and semiconductor fault situations. A comparison of three-phase, three-level VSIs with intermediate DC/DC boost converters and three-level quasi-Z-source inverters was reported in [15].…”
mentioning
confidence: 99%