Quantum-mechanical effects on the threshold voltage of ultrathin-SOI nMOSFETs

Ōmura, Yasuhisa; Horiguchi, S.; Tabe, Michiharu; Kishi, Kenji

doi:10.1109/55.260792

Cited by 265 publications

(94 citation statements)

References 5 publications

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“…Since we have not considered any quantum mechanical effects in our study, we have limited the choice of the silicon film thickness to 10 nm. For silicon film thicknesses below 10 nm, one would have to consider quantum mechanical effects [33].…”

Section: Device Structure and Simulation Parametersmentioning

confidence: 99%

Doping-Less Tunnel Field Effect Transistor: Design and Investigation

Kumar

Janardhanan

2013

IEEE Trans. Electron Devices

550

249

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Abstract-Using calibrated simulations, we report a detailed study of the doping-less tunnel field effect transistor (TFET) on a thin intrinsic silicon film using charge plasma concept. Without the need for any doping, the source and drain regions are formed using the charge plasma concept by choosing appropriate work functions for the source and drain metal electrodes. Our results show that the performance of the doping-less TFET is similar to that of a corresponding doped TFET. The doping-less TFET is expected to be free from problems associated with random dopant fluctuations. Further, fabrication of doping-less TFET does not require high-temperature doping/annealing processes and therefore, cuts down the thermal budget opening up the possibilities for fabricating TFETs on single crystal silicon-onglass substrates formed by wafer scale epitaxial transfer.

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Section: Device Structure and Simulation Parametersmentioning

confidence: 99%

Doping-Less Tunnel Field Effect Transistor: Design and Investigation

Kumar

Janardhanan

2013

IEEE Trans. Electron Devices

550

249

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“…It has been shown that inclusion of quantum effects (QEs) which shifts the peak electron concentration away from the gate oxide interface towards the center of SOI film leads to shift in the threshold voltage of the device. Further, this effect is more significant for T Si < 5 nm [16][17][18]. Since T Si of 8 nm has been considered in this work, the impact of QEs can be ignored.…”

Section: Simulation Setupmentioning

confidence: 99%

Impact of Segregation Layer on Scalability and Analog/RF Performance of Nanoscale Schottky Barrier SOI MOSFET

Patil

Qureshi²

2012

JSTS:Journal of Semiconductor Technology and Science

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Abstract-In this paper, the impact of segregation layer density (N DSL ) and length (L DSL ) on scalability and analog/RF performance of dopant-segregated Schottky barrier (DSSB) SOI MOSFET has been investigated in sub-30 nm regime. It has been found that, although by increasing the N DSL the increased off-state leakage, short-channel effects and the parasitic capacitances limits the scalability, the reduced Schottky barrier width at source-to-channel interface improves the analog/RF figures of merit of this device. Moreover, although by reducing the L DSL the increased voltage drop across the underlap length reduces the drive current, the increased effective channel length improves the scalability of this device. Further, the gain-bandwidth product in a commonsource amplifier based on optimized DSSB SOI MOSFET has improved by ~40% over an amplifier based on raised source/drain ultrathin-body SOI MOSFET. Thus, optimizing N DSL and L DSL of DSSB SOI MOSFET makes it a suitable candidate for future nanoscale analog/RF circuits

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“…At every time step the forces on each particle due to all the other particles in the system are calculated from Eq. (77). From the forces, an interactive electric field is obtained which is added to the external electric field of the system to couple the Molecular Dynamics to the Monte Carlo.…”

Section: Carrier-carrier Interactionsmentioning

confidence: 99%

Monte Carlo Device Simulations

Raleva¹,

Shaik

Hathwar

et al. 2011

Applications of Monte Carlo Method in Science and Engineering

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As semiconductor devices are scaled into nanoscale regime, first velocity saturation starts to limit the carrier mobility due to pronounced intervalley scattering, and when the device dimensions are scaled to 100 nm and below, velocity overshoot (which is a positive effect) starts to dominate the device behavior leading to larger ON-state currents. Alongside with the developments in the semiconductor nanotechnology, in recent years there has been significant progress in physical based modeling of semiconductor devices. First, for devices for which gradual channel approximation can not be used due to the two-dimensional nature of the electrostatic potential and the electric fields driving the carriers from source to drain, drift-diffusion models have been exploited. These models are valid, in general, for large devices in which the fields are not that high so that there is no degradation of the mobility due to the electric field. The validity of the drift-diffusion models can be extended to take into account the velocity saturation effect with the introduction of field-dependent mobility and diffusion coefficients. When velocity overshoot becomes important, drift diffusion model is no longer valid and hydrodynamic model must be used. The hydrodynamic model has been the workhorse for technology development and several high-end commercial device simulators have appeared including Silvaco, Synopsys, Crosslight, etc. The advantages of the hydrodynamic model are that it allows quick simulation runs but the problem is that the amount of the velocity overshoot depends upon the choice of the energy relaxation time. The smaller is the device, the larger is the deviation when using the same set of energy relaxation times. A standard way in calculating the energy relaxation times is to use bulk Monte Carlo simulations. However, the energy relaxation times are material, device geometry and doping dependent parameters, so their determination ahead of time is not possible. To avoid the problem of the proper choice of the energy relaxation times, a direct solution of the Boltzmann Transport Equation (BTE) using the Monte Carlo method is the best method of choice. That is why the focus of this review paper is on explaining basic Monte Carlo device simulator and then the focus will be shifted on the inclusion of various higher order effects that explain particular physical phenomena or processes.The Monte Carlo book chapter is organized as follows. First, the idea behind the Monte Carlo technique is outlined by revoking the path integral method for the solution of the BTE. This approach naturally leads to the free-flight-scatter sequence that is used in solving the BTE using the Monte Carlo method. Various scattering mechanisms relevant for different materials are given to completely specify the collision integral in the BTE. A discussion followed with the presentation of a generic flow-chart for implementing bulk Monte Carlo code is presented. Note that bulk Monte Carlo approach is suitable for the characterization of ma...

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Quantum-mechanical effects on the threshold voltage of ultrathin-SOI nMOSFETs

Cited by 265 publications

References 5 publications

Doping-Less Tunnel Field Effect Transistor: Design and Investigation

Doping-Less Tunnel Field Effect Transistor: Design and Investigation

Impact of Segregation Layer on Scalability and Analog/RF Performance of Nanoscale Schottky Barrier SOI MOSFET

Monte Carlo Device Simulations

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