Quadruple well CMOS MAPS with time-invariant processor exposed to ionizing radiation and neutrons

Abstract

Monolithic active pixel sensors featuring a timeinvariant front-end channel have been fabricated in a quadruple well CMOS process in the frame of an R&D project aiming at developing low material budget, radiation hard detectors for tracking applications. MAPS prototypes have been exposed to integrated fluences up to 10 14 1 MeV neutron equivalent/cm 2 to test the device tolerance to bulk damage also for different values of the epitaxial layer resistivity. Moreover, samples of the same device have been irradiated with γ-rays from a 60 Co source, reaching a final dose exceeding 10 Mrad, to study ionizing radiation effects. This work discusses the test results, obtained through different measurement techniques, and the mechanisms underlying performance degradation in irradiated quadruple well CMOS MAPS.

The effect of the displacement damage on the Charge Collection Efficiency in Silicon Drift Detectors for the LOFT satellite

“…[23,24]. The authors show that the decrease of CCE is negligible for a TID of tens [23] or even hundreds [24] of krad.…”

“…The variation of the CCE produced by the Total Ionising Dose (TID) in silicon detectors is discussed for example in Ref. [23,24]. The authors show that the decrease of CCE is negligible for a TID of tens [23] or even hundreds [24] of krad.…”

“…[23,24]. The authors show that the decrease of CCE is negligible for a TID of tens [23] or even hundreds [24] of krad. Consequently, the TID of ∼ 400 rad(Si) provided to the SDD during our irradiation at PIF is not expected to produce significant effects on the CCE.…”