PYNQ- Torch: a framework to develop PyTorch accelerators on the PYNQ platform

Vohra, Manohar; Fasciani, Stefano

doi:10.1109/isspit47144.2019.9001806

Cited by 10 publications

(2 citation statements)

References 5 publications

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“…Thus, only small ANN models are allowed. We provide High-Level-Synthesis (HLS) C++ implementation of the following building blocks, based on [42]:…”

Section: B Architecture Of the Proposed Systemmentioning

confidence: 99%

The Portiloop: a deep learning-based open science tool for closed-loop brain stimulation

Valenchon,

Bouteiller,

Jourde

et al. 2021

Preprint

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Electroencephalography (EEG) is a method of measuring the brain's electrical activity, using non-invasive scalp electrodes. In this article, we propose the Portiloop, a deep learning-based portable and low-cost device enabling the neuroscience community to capture EEG, process it in real time, detect patterns of interest, and respond with precisely-timed stimulation. The core of the Portiloop is a System on Chip composed of an Analog to Digital Converter (ADC) and a Field-Programmable Gate Array (FPGA). After being converted to digital by the ADC, the EEG signal is processed in the FPGA. The FPGA contains an ad-hoc Artificial Neural Network (ANN) with convolutional and recurrent units, directly implemented in hardware. The output of the ANN is then used to trigger the user-defined feedback. We use the Portiloop to develop a real-time sleep spindle stimulating application, as a case study. Sleep spindles are a specific type of transient oscillation (∼2.5 s, 12-16 Hz) that are observed in EEG recordings, and are related to memory consolidation during sleep. We tested the Portiloop's capacity to detect and stimulate sleep spindles in real time using an existing database of EEG sleep recordings. With 71% for both precision and recall as compared with expert labels, the system is able to stimulate spindles within ∼300 ms of their onset, enabling experimental manipulation of nearly the entire spindle. The Portiloop can be extended to detect and stimulate other neural events in EEG. It is fully available to the research community as an open science project 1 .

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“…Thus, only small ANN models are allowed. We provide High-Level-Synthesis (HLS) C++ implementation of the following building blocks, based on [42]:…”

Section: B Architecture Of the Proposed Systemmentioning

confidence: 99%

The Portiloop: a deep learning-based open science tool for closed-loop brain stimulation

Valenchon,

Bouteiller,

Jourde

et al. 2021

Preprint

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“…O framework PYNQ, e as respectivas placas compatíveis com ele, têm sido usados para construção de aceleradores para as mais diversas aplicações, como processamento de áudio [Stornaiuolo et al 2019], detecção de objetos [Elsaadouny et al 2020], criptografia [Shaher et al 2020] e sobretudo inteligência artificial [Rybalkin et al 2018], [Stornaiuolo et al 2018] e [Vohra and Fasciani 2019].…”

Section: Placa Ultra96 E O Ambiente Pynqunclassified

GrayScaleAccel: Acelerador de Escala de Cinza em FPGA

Silva

Fernandes

2020

Anais Estendidos Do XXI Simpósio Em Sistemas Computacionais De Alto Desempenho (SSCAD Estendido 2020)

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Neste artigo é apresentado o GrayScaleAccel, uma solução HardwareSoftware que acelera um algoritmo de escala de cinza em até 183 vezes comparado a versão puramente em software. Este acelerador utiliza a placa Ultra96 e o framework PYNQ que favorecem esta solução devido a plataforma ter processador e FPGA fortemente integrados e ser compatível com framework de alta produtividade em Python. Os resultados de síntese ainda sugerem que há muitos recursos no FPGA para serem utilizados para exploração de paralelismo desta aplicação ou outras ainda mais ambiciosas.

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