PVMC: Task Mapping and Scheduling under Process Variation Heterogeneity in Mixed-Criticality Systems

Bahrami, F; Ranjbar, Behnaz; Rohbani, Nezam; Ejlali, Alireza

doi:10.1109/tetc.2021.3072286

Cited by 5 publications

(3 citation statements)

References 33 publications

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“…Bahrami et al propose a multicore energyefficient task scheduling method for streaming media applications. After the method converts the dependent task set into independent tasks, the task mapping is determined with the principle of minimum energy consumption under the constraints of hard real-time conditions [14]. Nakada et al proposed an energy-efficient task scheduling algorithm for homogeneous multicore processors [13].…”

Section: Literature Reviewmentioning

confidence: 99%

Low-Power Task Scheduling Algorithm for the Multicore Processor System Based on the Genetic Algorithm

2022

Wireless Communications and Mobile Computing

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In order to solve the periodic hard real-time tasks with dependencies on multicore processors, the author proposes a low-power task scheduling algorithm for multicore processor systems based on the genetic algorithm. This method first uses the RDAG algorithm to separate the tasks and then takes the lowest power consumption as the principle; a genetic algorithm is used to determine the task mapping. Experimental results show that based on the power consumption model of Intel PXA270, several random task sets are used for simulation experiments, which shows that this method saves 20% to 30% of the energy consumption compared with the existing methods. This method effectively shortens the completion time of tasks, improves the utilization efficiency of multicore system resources, improves the parallel computing capability of multicore systems, reduces the average response time of tasks, and improves the throughput and resource utilization of multicore systems.

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Section: Literature Reviewmentioning

confidence: 99%

Low-Power Task Scheduling Algorithm for the Multicore Processor System Based on the Genetic Algorithm

2022

Wireless Communications and Mobile Computing

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“…R ECENTLY, multi-core real-time embedded systems where industrial applications with real-time constraints are executed, becomes significant. These systems are responsible for executing an application with a set of High-Criticality (HC) and Low-Criticality (LC) tasks on a single platform [1]- [3]. For instance, aerospace applications have flight-critical tasks that must be executed before the deadline and missionoriented tasks that are important, but they could be dropped in critical situations [2].…”

Section: Introductionmentioning

confidence: 99%

“…In MC systems, if an HC task overruns (the task's execution time exceeds the low WCET), the system switches to a highcriticality mode (HI mode). In this mode, the system considers the high WCET for all the remaining tasks to guarantee the safety of the system, and it stays in this mode until there is no HC task in the ready queue of each core [1]- [3]. In this situation, the execution of all LC and HC tasks requires higher computational demands, which may exceed the processor's capacity, and the system becomes overloaded [6].…”

Section: Introductionmentioning

confidence: 99%

Toward the Design of Fault-Tolerance-Aware and Peak-Power-Aware Multicore Mixed-Criticality Systems

Ranjbar

Hosseinghorban

Salehi

et al. 2022

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Mixed-Criticality (MC) systems have recently been devised to address the requirements of real-time systems in industrial applications, where the system runs tasks with different criticality levels on a single platform. In some workloads, a highcritically task might overrun and overload the system, or a fault can occur during the execution. However, these systems must be fault-tolerant and guarantee the correct execution of all highcriticality tasks by their deadlines to avoid catastrophic consequences, in any situation. Furthermore, in these MC systems, the peak power consumption of the system may increase, especially in an overload situation and exceed the processor Thermal Design Power (TDP) constraint. This may cause generating heat beyond the cooling capacity, resulting the system stop to avoid excessive heat and halting the processor. In this paper, we propose a technique for dependent dual-criticality tasks in fault-tolerant multi-core MC systems to manage peak power consumption and temperature. The technique develops a tree of possible task mapping and scheduling at design-time to cover all possible scenarios and reduce the low-criticality task drop rate in the highcriticality mode. At run-time, the system exploits the tree to select a proper schedule according to fault occurrences and criticality mode changes. Experimental results show that the average task schedulability is 74.14% on average for the proposed method, while the peak power consumption and maximum temperature are improved by 16.65% and 14.9 • C on average, respectively, compared to a recent work. In addition, for a real-life application, our method reduces the peak power and maximum temperature by up to 20.06% and 5 • C, respectively, compared to a state-ofthe-art approach.

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A survey of energy-aware scheduling in mixed-criticality systems

Zhang

Chen

2022

Journal of Systems Architecture

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PVMC: Task Mapping and Scheduling under Process Variation Heterogeneity in Mixed-Criticality Systems

Cited by 5 publications

References 33 publications

Low-Power Task Scheduling Algorithm for the Multicore Processor System Based on the Genetic Algorithm

Low-Power Task Scheduling Algorithm for the Multicore Processor System Based on the Genetic Algorithm

Toward the Design of Fault-Tolerance-Aware and Peak-Power-Aware Multicore Mixed-Criticality Systems

A survey of energy-aware scheduling in mixed-criticality systems

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