Pulsed characterisation of trapping dynamics in AlGaN/GaN HEMTs

Abstract

Time-domain pulsed I-V measurements dedicated to characterising and modelling the time-dependent trapping phenomena of wide band-gap AlGaN/GaN high electron mobility transistors (HEMTs) are presented. The influence of temperature, electric field and their mutual interaction on trap activation and time constants are investigated and illustrated in the case of 2 × 75 × 0.15 µm 2 AlGaN/GaN HEMTs from the III-V Lab. These measurements show that the most influential parameter on trap activation is the electric field induced by the highest drain voltage V DS-max reached during a pulse sequence, which leads to the drain current collapse. These characterisations are intended to develop and improve new nonlinear models of GaN HEMTs, taking into account the dynamics of traps for modulated signals.Introduction: AlGaN/GaN high electron mobility transistors (HEMTs) are the most promising candidates for future wireless and radar applications. The intrinsic material properties of GaN such as high electron mobility, wide band-gap and high electron saturation velocity give it superiority over its predecessors like the Si and GaAs devices. Despite the fact that GaN technologies are already on the commercial market, mainly for applications below the X-band, many issues still need to be addressed. Among these, one of the most important issues is the drain current collapse also called kink effect that directly affects the output power, gain and RF transitions of microwave devices under pulse modulated signals.A similar behaviour was reported for GaAs devices [1] where it is caused by impact ionisation, which leads to a sudden rise in the drain current. This explanation is not well suited for GaN devices due to their high breakdown voltage although it can be true at very low temperatures [2]. Kink effect in GaN HEMTs is mainly attributed to carrier trapping [3]. In this Letter, a series of I-V measurements are performed under DC and pulsed modes to characterise the influence of the key parameters involved in carrier trapping, which are temperature and drain voltage.

Effect of OFF-state stress induced electric field on trapping in AlGaN/GaN high electron mobility transistors on Si (111)

“…Figure 2 This increase of dyn-R DS[ON] degradation for smaller L gd devices can be attributed to increased trapping due to activation of additional trapping centres caused by high-EF in the gate-drain region. 18 This behaviour follows the Poole-Frenkel field-dependent emission process where the rate of electron detrapping from the traps experiencing high-EF substantially increase due to potential barrier lowering given by…”

Analysis of Trapping Effects on AlInN/GaN High Electron Mobility Transistors with Pulsed Electrical Measurements Under Visible and Infrared Illumination

“…It can be done immediately after the fabrication of the devices or electrical stresses under operational conditions and/or in a radiation environment. [7,[11][12][13][14][15][16][17] Thus, the characterization of trapping or detrapping phenomena can be investigated by various techniques such as capacitance deep-level transient spectroscopy, [18] drain-current deep-level transient spectroscopy, [9] gate and drain lag measurements, [19] double pulse measurements, [20] photoionization spectroscopy, [21] electroluminescence techniques, [22] and deep-level optical spectroscopy. [23] All these techniques can provide information on the trapping effects responsible for the electrical performance degradation of GaN-based devices.…”

Studies of traps in AlGaN/GaN high electron mobility transistors on silicon

“…5.8, the rate of increase of τe with respect to VD[ON]_Stress exhibited a similar trend for both experiment (■-markers) and simulation (▲-markers) except with some deviation at high VD[ON]_Stress caused by self-heating effects [136]. This shows that the obtained transient signals contain information from various trap energy levels which are activated by the applied VD[ON]_Stress [56]. HEMTs, about one order of magnitude lower gate leakage current and ~ 60% reduction in current collapse was observed in the MISHEMTs.…”

“…As shown in Fig The source of such traps are found to be either due to crystalline imperfections as a result of epitaxial growth, or due to various device fabrications processes. The trap centres can also be activated when the devices are operated at high voltages [56]. The existence of traps in the devices lead to drain current dispersion followed by the reduction of outputpower at high-frequency operation [52,53] [58].…”

“…5.9. As the VD[ON]_Stress increases, the GaN conduction band bends downwards activating different trap energy levels[56].…”