Pulse width modulation schemes enabling single DC power source driven dual two‐level voltage source inverter with single voltage source inverter switching

Srinivas, S.; Kalaiselvi, J.

doi:10.1049/iet-pel.2013.0283

Cited by 29 publications

(18 citation statements)

References 34 publications

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“…When ZSC flows, which is caused by the generated zero‐sequence voltage (ZSV) on the path provided by the structure of single dc source D2L‐VSI, using D2L‐VSIs with isolated dc sources is able to eliminate ZSC completely since there is not any path for ZSC to flow [11, 22]. By using an isolating transformer to isolate dc sources, common‐mode current (CMC) could not flow from the frame of electric motors to ground, star‐point of the three‐phase supply, and finally mid‐point of the dc‐link capacitors due to the fact that the secondary windings are not grounded [23].…”

Section: Introductionmentioning

confidence: 99%

Adapted near‐state PWM for dual two‐level inverters in order to reduce common‐mode voltage and switching losses

Aghazadeh

Khodabakhshi‐Javinani

Nafisi

et al. 2019

IET power electron.

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In this paper, a near-state pulse-width modulation (NSPWM) algorithm is proposed and implemented on dual-twolevel voltage-source inverters (D2L-VSIs) in order to reduce the common-mode voltage (CMV), the inverter switching losses, the current total harmonic distortion, and the side effects of bearing currents-compared with space vector modulation (SVM) and PWM7. To gain these goals, two conventional two-level inverters of the D2L-VSI are controlled, separately, with specific switching sequences and an adjusted phase difference between the carriers of two inverters. For evaluating and comparing these PWM techniques mathematically, both CMV root mean square generated and switching losses of the D2L-VSI are formulated as a function of the power factor of the D2L-VSI, which is driven by the methods detailed in this study. Eventually, theories and analysis, as well as simulations and experimental results-which are generated by MATLAB/Simulink environment and a 300 W scaled-down D2LVSI prototype, respectively-authenticate the superiority of the proposed NSPWM over both SVM and PWM7.

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Section: Introductionmentioning

confidence: 99%

Adapted near‐state PWM for dual two‐level inverters in order to reduce common‐mode voltage and switching losses

Aghazadeh

Khodabakhshi‐Javinani

Nafisi

et al. 2019

IET power electron.

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“…2 [21] and it is therefore imperative that DTLI offers very high switching redundancy. ZSV v ZSV in the DTLI can be derived using its three phase output voltages v aa′ , v bb′ and v cc′ and is given as [23,24] V S = v aa′ + v bb′ e j2π/3 + v cc′ e j4π/3…”

Section: Zsv and Switching Combinations In Dtlimentioning

confidence: 99%

“…SIM-1, inverter-1 is always clamped to generate the clamping vector while inverter-2 is used to generate the switching vector in the entire cycle of operation for completely eliminating the ZSV. By adopting the procedure reported in [23], the region in which SV falls is first identified. For instance, if it falls in region R 1 , the clamping state of inverter-1 will be set to 1 (+− −) and SIM-1 PWM algorithm forces the switching states of inverter-2 in such a manner that it results in a zero, ZSV (Table 1) in the DTLI.…”

Section: Sim-1 Pwm For Zsv Eliminationmentioning

confidence: 99%

“…Use of two isolated DC power sources is recommended for the individual two-level inverters, in order to cease the flow of zero sequence current in the DTLI circuit [17][18][19][20][21][22]. Recently, it is reported that CMV and ZSV in DTLI are different from each other [23,24]. ZSV in the DTLI is eliminated not only using common mode chokes [11,22], extra switching resources/circuits [25] but also using special PWM techniques [26][27][28][29].…”

Section: Introductionmentioning

confidence: 99%

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Torque ripple reduction PWMs for a single DC source powered dual‐inverter fed open‐end winding induction motor drive

Sekhar¹,

Srinivas²

2018

IET Power Electronics

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Two new pulse width modulation (PWM) methods are proposed for a dual two-level inverter (DTLI) fed open-end winding induction motor drive for complete elimination of zero sequence voltage (ZSV), enabling the DTLI drive to be powered from a single DC power supply only. One of the PWM methods is carefully devised and uses a single inverter only to be switched at all instants of time and dwell times of that switching inverter are derived by applying a simple volt-second balance principle, for ZSV elimination. The second PWM method involves switching of both the inverters, for ZSV elimination in the DTLI. While the dwell times of first inverter are derived using the concept of 'effective-time', whereas dwell times of the second inverter are obtained by thoughtfully exploiting the notion of 'phase-shift'. Additionally, torque ripple performance of the open-end winding induction motor is theoretically analysed; ripple content is quantified to compare the performance of the proposed PWM methods. Finally, a typical PWM variant that results in the least torque ripple in the induction motor is recommended. All the envisaged ZSV elimination PWM methods and its variants are simple to implement and are first analysed, simulated and experimentally verified.

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“…Also, new variety of voltage source inverter topologies are researched reporting annihilation of unwanted effects such as neutral-point fluctuations, clamping capacitor issues, more isolated sources requirements etc. from which the conventional multilevel inverter topologies suffer [13][14][15][16][17][18][19][20][21]. Towards this end, a new three-level cascaded inverter based on 2 two-level inverters was proposed in [22].…”

Section: Introductionmentioning

confidence: 99%

Five‐level torque controller‐based DTC method for a cascaded three‐level inverter fed induction motor drive

Naganathan¹,

Srinivas²,

Ittamveettil³

2017

IET Power Electronics

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Two cascaded two-level inverters can synthesise three-level voltage space vector. For the cascaded three-level inverter controlled induction motor, this study proposes a five-level torque controller (FLTC)-based direct torque control (DTC) method especially for improving steady-state motor torque performance and retaining the high dynamic performance. The proposed FLTC method employs hysteresis controllers, uses look-up tables and ends up with variable switching frequency of the cascaded three-level inverter. Computationally, the envisaged FLTC method is quite comparable to that of the basic DTC method. The FLTC method ensures reduced switching commutations in the inverter switching devices during low speeds of operation and simultaneously achieves reduced dv/dt switching stresses. An inherent drawback of FLTC method at higher speeds of operation is identified, theoretically analysed and a pseudo error-based correction is also suggested in this study to overcome the drawback. The steady-state and transient motor torque performance of the induction motor with the use of the envisaged FLTC-based DTC method is thoroughly analysed, simulated using Matlab/Simulink and then experimentally validated on a laboratory prototype for starting, speed reversal and load change conditions with the use of the cascaded three-level inverter.

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Pulse width modulation schemes enabling single DC power source driven dual two‐level voltage source inverter with single voltage source inverter switching

Cited by 29 publications

References 34 publications

Adapted near‐state PWM for dual two‐level inverters in order to reduce common‐mode voltage and switching losses

Adapted near‐state PWM for dual two‐level inverters in order to reduce common‐mode voltage and switching losses

Torque ripple reduction PWMs for a single DC source powered dual‐inverter fed open‐end winding induction motor drive

Five‐level torque controller‐based DTC method for a cascaded three‐level inverter fed induction motor drive

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