Pulse-density modulation for RF applications: The radio-frequency power amplifier (RF PA) as a power converter

Abstract

-Switching processes such as pulse-width and pulse-density modulation have been used for many years in power electronics applications. Due to rapid scaling of semiconductor technology, similar approaches may be successfully applied to blocks in the radio architecture. This work outlines the implementation of a class-D power amplifier for RF applications in low-GHz frequency bands. We describe the motivation for using pulse-density modulation (PDM) to achieve linear amplitude modulation of a nominally nonlinear switching power amplifier. The amplifier achieves linearity suitable for wideband wireless standards, with peak efficiency of 43.5% at 1.95GHz and up to 20dBm output power. The system generates amplitudemodulated waveforms with up to 20MHz envelope bandwidth, demonstrating the validity of this approach for modern communication standards. I.INTRODUCTION After decades of successful process and technology scaling, active semiconductor devices are now operating with current and power gain-bandwidths (f t and f max ) in excess of 100GHz [1][2]. This enables efficient operation of deep-submicron CMOS technology at radio frequencies with conventional analog and digital circuitry. In modern digital CMOS technologies, core libraries of standard cells can operate at low-GHz carrier frequencies. Combined with extraction of layout parasitics, standard-cell designflow allows direct and rapid synthesis of computational blocks at RF frequencies. This enables complex digital processing and control of RF switching waveforms.Trends in processing speed and circuit design methodology will have a direct impact on many blocks in wireless systems. As this work demonstrates, techniques previously used for audio amplifiers, motor control, and power conversion may now be relevant for RF applications. Here we present an RF power amplifier (RF PA) implemented as a power digital-analog converter (DAC). The class-D PA operates with both NMOS and PMOS complementary devices. With PMOS f t on the order of 40GHz in the 90nm process, switching power loss is substantially reduced compared to previous generations of CMOS technology. We implement digital control of the carrier amplitude using pulse-density modulation (PDM). Two stages of digital circuitry shape quantization noise away from the signal band. A High quality factor (Q) passive filter attenuates out-of-band noise, and reduces power loss from harmonics. Matching networks and filtering is implemented at the board level to achieve higher quality factor. With appropriate passive components, we achieve unloaded Q in the range of 20-30 in the output network [3].