Pseudo-Reconfigurable Heterogeneous Solution for Accelerating Spectral Clustering

Maliţa, Mihaela; Popescu, George Vladut; Gheorghe, Ștefan

doi:10.1109/bigdata50022.2020.9378150

Cited by 3 publications

(1 citation statement)

References 10 publications

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“…One solution for avoiding the effect of latency introduced by the reduction network is to use a queue memory distributed along the MAP array, each cell harboring one level, starting with the left-most cell [13]. In each cycle the result of multiplying one matrix line with the vector is submitted to the reduction net, then, after log 2 n cycles, the first inner product is generated at the output REDUCE (see Fig.…”

Section: Matrix-vector Multiplicationmentioning

confidence: 99%

Untitled

2024

ROMJIST

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Some parallel computing patterns can be accelerated using appropriate networks of simple circuits. We propose a solution, based on the Beneš-Waksman permutation network, which is adapted to efficiently accelerate not only permutation, but some of the most used parallel computational patterns such as: pack, prefix operations and reductions. The structural context considered for deploying our circuit is the map parallel pattern represented by an array of computational elements. The developed network receives a vector from the map array and outputs a vector for functions such as permute, pack, prefix sum (thus closing a first global loop over the map array of cells). For reduction functions (add, min, max) the network returns a scalar (thus closing a second global loop over the map array). With these improvements, this network adds circuit support for frequently used functions, in addition to map-type functions performed in the array of computing elements. While for reduction functions the frame of the permutation network can be easily adapted, for prefix functions and for the pack function new forms of implementation are proposed. The cells of the Beneš-Waksman network are redesigned to support the additional functionality. Some applications are then presented to emphasize the utility of our design.

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Section: Matrix-vector Multiplicationmentioning

confidence: 99%

Untitled

2024

ROMJIST

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Evaluation of AES Cryptographic Algorithm on a General-Purpose Map-Scan Accelerator

Pietricică,

Antonescu,

Popescu

2023

2023 International Semiconductor Conference (CAS)

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Multi-Function Scan Circuit for Assisting the Parallel Computational Map Pattern

ANTONESCU,

ȘTEFAN

2024

ROMJIST

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Some parallel computing patterns can be accelerated using appropriate networks of simple circuits. We propose a solution, based on the Beneš-Waksman permutation network, which is adapted to efficiently accelerate not only permutation, but some of the most used parallel computational patterns such as: pack, prefix operations and reductions. The structural context considered for deploying our circuit is the map parallel pattern represented by an array of computational elements. The developed network receives a vector from the map array and outputs a vector for functions such as permute, pack, prefix sum (thus closing a first global loop over the map array of cells). For reduction functions (add, min, max) the network returns a scalar (thus closing a second global loop over the map array). With these improvements, this network adds circuit support for frequently used functions, in addition to map-type functions performed in the array of computing elements. While for reduction functions the frame of the permutation network can be easily adapted, for prefix functions and for the pack function new forms of implementation are proposed. The cells of the Bene\v s-Waksman network are redesigned to support the additional functionality. Some applications are then presented to emphasize the utility of our design.

show abstract

Pseudo-Reconfigurable Heterogeneous Solution for Accelerating Spectral Clustering

Cited by 3 publications

References 10 publications

Untitled

Untitled

Evaluation of AES Cryptographic Algorithm on a General-Purpose Map-Scan Accelerator

Multi-Function Scan Circuit for Assisting the Parallel Computational Map Pattern

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