Provably good global buffering by generalized multiterminal multicommodity flow approximation

Exact and Approximation Algorithms for DNA Tag Set Design

“…Fig. 1 computes a (1 − ε) The fractional solution computed by the Garg and Könemann algorithm is then used to construct a feasible set of tags using a simple method that has been shown by Dragan et al (2002) to work better in practice than classical randomized rounding (Raghavan and Thomson, 1987), particularly when starting from poor approximate solutions such as those obtained by running the algorithm in Fig. 1 with a large value of ε.…”

Multicommodity Flow Algorithms for Buffered Global Routing

“…An alternative implementation, originally suggested by [16], is to compute edge flows instead of path flows during the algorithm in Figure 1.3, and then implement randomized rounding by performing a random walk between the source and sink of each net. As noted in [10], performing the random walks backwards, i.e., from sinks towards sources, leads to reduced congestion for the case when a significant number of the 2-pin nets result from decomposition of multi-pin nets.…”

“…Although the integer program has exponential size (there are exponentially many variables corresponding to sourcesink paths in the auxiliary graph), we give a combinatorial algorithm which runs in polynomial time by representing explicitly only non-zero variables (Section 3.2). The algorithm combines the general framework for multicommodity flow approximation introduced by [12,11] with some of the extensions described in [2] and [10].…”

“…The algorithm for approximating the optimum solution to LP (1.2) (see Figure 1.3) uses the general framework for multicommodity flow approximation introduced in [12] combined with ideas similar to those in [10] for efficiently handling set capacity constraints. The algorithm relies on simultaneously approximating the dual LP:…”

“…In addition to handling traditional objectives such as congestion, wirelength and timing, a critical requirement for next generations of global routers is the integration with other interconnect optimizations, most importantly with buffer insertion and sizing. Indeed, it is estimated that top-level on-chip interconnect will require up to 10 6 repeaters when we reach the 50nm technology node. Since these repeaters are large and have a significant impact on global routing congestion, buffer insertion and sizing can no longer be done after global routing completes.…”