2015 International Conference on Field Programmable Technology (FPT) 2015
DOI: 10.1109/fpt.2015.7393143
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Provably Correct Development of reconfigurable hardware designs via equational reasoning

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Cited by 4 publications
(10 citation statements)
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“…There are some constructs of VHDL that have not been implemented in ReWire (e.g., tri-state bu ers, multiple clock domains, etc.). We believe such constructs can be readily modeled in ReWire, but they have not been necessary for previous case studies [84,83,43,42,47,46].…”
Section: Related Workmentioning
confidence: 99%
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“…There are some constructs of VHDL that have not been implemented in ReWire (e.g., tri-state bu ers, multiple clock domains, etc.). We believe such constructs can be readily modeled in ReWire, but they have not been necessary for previous case studies [84,83,43,42,47,46].…”
Section: Related Workmentioning
confidence: 99%
“…ReWire is a subset of Haskell-from which circuits are synthesized automatically. The language, design and implementation of ReWire has been introduced in previous work [83,43,42,47].…”
Section: Introductionmentioning
confidence: 99%
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