Prototyping and hardware‐in‐loop verification of OCR

IET Generation, Transmission & Distribution

2020

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Section: Digital Design Of the Proposed Idt Algorithmmentioning

confidence: 99%

FPGA implementation of an Islanding detection technique for microgrid using periodic maxima of superimposed voltage components

IET Generation, Transmission & Distribution

2020

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“…The output of ADC is processed by the discrete Fourier transform (DFT) module where the fundamental component of the signal is extracted. The emulation of the overcurrent relay is presented under the OCM . Here, the magnitude of the root mean square (RMS) of the incoming signal and emulation of the inverse characteristics are performed.…”

Section: Internal Architecture Of Multifunctional Relaymentioning

confidence: 99%

“…During HIL verification, signals are taken out from the GTAO card through GPC processor of RTDS. The latency between GPC processor card and GTAO card is 9.203 μs . The communication latency of the signal conditioning module, ie, AAF and DC‐offset module is 62.5 μs.…”

Section: Experimental Setup For Hil Verificationmentioning

confidence: 99%

Design and verification of hardcore reconfigurable relay for islanding detection and subsequent mode adaptation of microgrid

Int Trans Electr Energ Syst

2019

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Summary Islanding detection is an important factor of the microgrid (MG) protection. Since an MG can work in two modes, ie, grid‐connected and stand‐alone/islanded mode, during any abnormality appearing in the upstream grid, the MG must be decoupled at the point of common coupling and made to operate in the islanded mode to sustain the critical loads. Because of this mode switching, it is necessary to change the pick up current settings of the overcurrent relays (OCRs) at the distributed generators (DGs) to accommodate the changes in the current levels. In this paper, a hardcore reconfigurable multifunctional relay is designed, which is used for the islanding detection as well as mode adaptation within the MG. A modular approach is used to implement the design, which is targeted on field‐programmable gate array (FPGA). Hardware description language, Verilog, is used to develop the optimized hardware. The relay has different submodules viz overcurrent, voltage unbalance, and rate of change of frequency (ROCOF) modules, which are controlled by a soft controller using a multiplexer. Hardware‐in‐loop (HIL) verification for various test cases under different power mismatches is performed on the Real Time Digital Simulator (RTDS) with FPGA setup. The results suggest that the proposed hardcore relay have the capability to identify the islanding event within permissible time and subsequently adapt to the mode of operation effectively.

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RT-HIL verification of FPGA-based communication-assisted adaptive relay for microgrid protection

Kumar¹,

2021

Electr Eng