2023 IEEE International Memory Workshop (IMW) 2023
DOI: 10.1109/imw56887.2023.10145967
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Proposal of P-Channel FE NAND with High Drain Current and Feasible Disturbance for Next Generation 3D NAND

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(2 citation statements)
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“…Moreover, the decoupled read and write terminals facilitate the independent fine-tuning of the MTJ and SHE-metal dimensions, optimizing both readability and writability [64]. In the nvSRAM cell, M7 and M8 serve as extra access transistors that are disabled to separate the SHE-MTJs from the standard 6T SRAM [20]; (b) a 1FeFET FRAM [72][73][74][75]; (c) a 8T-2MTJ nvSRAM [64]; (d) a 1T-1MTJ MRAM [76,77]; (e) a 12T-2R nvSRAM [19]; (f) a 1T-1R RRAM [21,54,78]; and (g) a 1T-1PCM PCM [22,79].…”
Section: Design Considerations For Nvm In Mcumentioning
confidence: 99%
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“…Moreover, the decoupled read and write terminals facilitate the independent fine-tuning of the MTJ and SHE-metal dimensions, optimizing both readability and writability [64]. In the nvSRAM cell, M7 and M8 serve as extra access transistors that are disabled to separate the SHE-MTJs from the standard 6T SRAM [20]; (b) a 1FeFET FRAM [72][73][74][75]; (c) a 8T-2MTJ nvSRAM [64]; (d) a 1T-1MTJ MRAM [76,77]; (e) a 12T-2R nvSRAM [19]; (f) a 1T-1R RRAM [21,54,78]; and (g) a 1T-1PCM PCM [22,79].…”
Section: Design Considerations For Nvm In Mcumentioning
confidence: 99%
“…Figure 3. Bitcell structures of (a) a 6T-4C nvSRAM[20]; (b) a 1FeFET FRAM[72][73][74][75]; (c) a 8T-2MTJ nvSRAM[64]; (d) a 1T-1MTJ MRAM[76,77]; (e) a 12T-2R nvSRAM[19]; (f) a 1T-1R RRAM[21,54,78]; and (g) a 1T-1PCM PCM[22,79].…”
mentioning
confidence: 99%