2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA) 2018
DOI: 10.1109/isca.2018.00015
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PROMISE: An End-to-End Design of a Programmable Mixed-Signal Accelerator for Machine-Learning Algorithms

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Cited by 49 publications
(18 citation statements)
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“…Compared to the coarse-grained crossbars, the small fragment size corresponds to small ADCs. For example, FORMS can use 4-bit ADCs instead of one 8-bit ADC per each crossbar used in ISAAC [18] or PROMISE [57]. In general, the area and power of ADCs grow exponentially with the number of bits of ADCs.…”
Section: B Fragment Size Exploration and Zero Skipping Logicmentioning
confidence: 99%
“…Compared to the coarse-grained crossbars, the small fragment size corresponds to small ADCs. For example, FORMS can use 4-bit ADCs instead of one 8-bit ADC per each crossbar used in ISAAC [18] or PROMISE [57]. In general, the area and power of ADCs grow exponentially with the number of bits of ADCs.…”
Section: B Fragment Size Exploration and Zero Skipping Logicmentioning
confidence: 99%
“…This calls the use of the Julia language. For example, Srivastava Prakalp et al [119] designed an end-to-end programmable hybrid signal accelerator, PROMISE, for machine learning algorithms. PROMISE can use machine learning algorithms described by Julia and generate PROMISE code.…”
Section: Signal Processingmentioning
confidence: 99%
“…Analog [34], [35] and DRAM-based [36], [37], [38] accelerators have been proposed as alternatives to digital-CMOS accelerators. Our work uses ReRAM as an alternative.…”
Section: Related Workmentioning
confidence: 99%