Programming framework for clusters with heterogeneous accelerators

Tsoi, Kuen Hung; Tse, Anson H.T.; Pietzuch, Peter; Luk, Wayne

doi:10.1145/1926367.1926377

Cited by 7 publications

(2 citation statements)

References 10 publications

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“…Estimations are based on theoretical accelerator capabilities, compile-time parameters, or an offline training period over a fraction of the input dataset. Many applications [Galanis et al 2005;Yeung et al 2008;Scrofano et al 2007;Tripp et al 2005;Tsoi et al 2011] have employed various compile-time data partitioning and task partitioning schemes. However, many of them deal with either reconfigurable or GPU architectures without considering simultaneous execution on the CPUs as well.…”

Section: Introductionmentioning

confidence: 99%

A dynamic self-scheduling scheme for heterogeneous multiprocessor architectures

Belviranlı

Bhuyan

Gupta

2013

ACM Trans. Archit. Code Optim.

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Today's heterogeneous architectures bring together multiple general-purpose CPUs and multiple domainspecific GPUs and FPGAs to provide dramatic speedup for many applications. However, the challenge lies in utilizing these heterogeneous processors to optimize overall application performance by minimizing workload completion time. Operating system and application development for these systems is in their infancy. In this article, we propose a new scheduling and workload balancing scheme, HDSS, for execution of loops having dependent or independent iterations on heterogeneous multiprocessor systems. The new algorithm dynamically learns the computational power of each processor during an adaptive phase and then schedules the remainder of the workload using a weighted self-scheduling scheme during the completion phase. Different from previous studies, our scheme uniquely considers the runtime effects of block sizes on the performance for heterogeneous multiprocessors. It finds the right trade-off between large and small block sizes to maintain balanced workload while keeping the accelerator utilization at maximum. Our algorithm does not require offline training or architecture-specific parameters. We have evaluated our scheme on two different heterogeneous architectures: AMD 64-core Bulldozer system with nVidia Fermi C2050 GPU and Intel Xeon 32-core SGI Altix 4700 supercomputer with Xilinx Virtex 4 FPGAs. The experimental results show that our new scheduling algorithm can achieve performance improvements up to over 200% when compared to the closest existing load balancing scheme. Our algorithm also achieves full processor utilization with all processors completing at nearly the same time which is significantly better than alternative current approaches.

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Section: Introductionmentioning

confidence: 99%

A dynamic self-scheduling scheme for heterogeneous multiprocessor architectures

Belviranlı

Bhuyan

Gupta

2013

ACM Trans. Archit. Code Optim.

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“…Lee et al [9] proposed a compiler framework to use OpenMP for GPGPU program, Noaje et al [11] proposed a scheme to employ CPU and GPU by combination of "light" OpenMP and "heavy" MPI. Furthermore, Tsoi et al [14] proposes a scheme to divide program into heterogeneous architecture such as GPU and FPGA by task level. These researches provide familiar programming interface for GPU programming.…”

Section: Related Workmentioning

confidence: 99%

Flat

Miyoshi

Irie

Keigo

et al. 2012

Proceedings of the 5th Annual Workshop on General Purpose Processing With Graphics Processing Units

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For leveraging multiple GPUs in a cluster system, it is necessary to assign application tasks to multiple GPUs and execute those tasks with appropriately using communication primitives to handle data transfer among GPUs. In current GPU programming models, communication primitives such as MPI functions cannot be used within GPU kernels. Instead, such functions should be used in the CPU code. Therefore, programmer must handle both GPU kernel and CPU code for data communications. This makes GPU programming and its optimization very difficult.In this paper, we propose a programming framework named FLAT which enables programmers to use MPI functions within GPU kernels. Our framework automatically transforms MPI functions written in a GPU kernel into runtime routines executed on the CPU. The execution model and the implementation of FLAT are described, and the applicability of FLAT in terms of scalability and programmability is discussed. We also evaluate the performance of FLAT. The result shows that FLAT achieves good scalability for intended applications.

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Architecturally truly diverse systems: A review

Chamberlain

2020

Future Generation Computer Systems

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Programming framework for clusters with heterogeneous accelerators

Cited by 7 publications

References 10 publications

A dynamic self-scheduling scheme for heterogeneous multiprocessor architectures

A dynamic self-scheduling scheme for heterogeneous multiprocessor architectures

Flat

Architecturally truly diverse systems: A review

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