Process Challenges in Thin Wafers Fabrication with Double Side Hybrid Bond Pads for Chip Stacking

Kumar, Mishra Dileep; Nagendra Sekhar, Vasarla; Rao, B.S.S. Chandra; Choong Chong, Ser; Rao, Vempati Srinivasa

doi:10.1109/ectc51529.2024.00102

2024 IEEE 74th Electronic Components and Technology Conference (ECTC) 2024

DOI: 10.1109/ectc51529.2024.00102

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Process Challenges in Thin Wafers Fabrication with Double Side Hybrid Bond Pads for Chip Stacking

Mishra Dileep Kumar,

Vasarla Nagendra Sekhar,

B.S.S. Chandra Rao

et al.

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Process Challenges in Thin Wafers Fabrication with Double Side Hybrid Bond Pads for Chip Stacking

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