Probing the size and density of silicon nanocrystals in nanocrystal memory device applications

Abstract

Structural characterization via transmission electron microscopy and atomic force microscopy of arrays of small Si nanocrystals embedded in SiO 2 , important to many device applications, is usually difficult and fails to correctly resolve nanocrystal size and density. We demonstrate that scanning tunneling microscopy ͑STM͒ imaging enables a much more accurate measurement of the ensemble size distribution and array density for small Si nanocrystals in SiO 2 , estimated to be 2-3 nm and 4 ϫ 10 12 -3ϫ 10 13 cm −2 , respectively, in this study. The reflection high energy electron diffraction pattern further verifies the existence of nanocrystallites in SiO 2 . The present STM results enable nanocrystal charging characteristics to be more clearly understood: we find the nanocrystal charging measurements to be consistent with single charge storage on individual Si nanocrystals. Both electron tunneling and hole tunneling processes are suggested to explain the asymmetric charging/ discharging processes as a function of bias. © 2005 American Institute of Physics. ͓DOI: 10.1063/1.1852078͔Silicon nanocrystal memories 1 have attracted much attention in recent years. To fully exploit their potential advantages over conventional floating gate memory, it is essential to control as accurately as possible Si nanocrystal size, depth distribution, and areal density, as well as nanocrystal surface passivation and oxide defect density in SiO 2 matrix, all in a process compatible with ultra-large-scale integration. Transmission electron microscopy ͑TEM͒ is the most widely used tool to characterize nanocrystal size and distribution with high resolution, 2-4 and sometimes electron diffraction is used to further substantiate the existence of crystallites. We have used a combination of contact-mode atomic force microscopy ͑AFM͒ and reflection high energy electron diffraction ͑RHEED͒ to identify the existence of nanocrystals, and used an ultrahigh vacuum scanning tunneling microscope ͑UHV STM͒ to estimate nanocrystal size and areal density. Compared with TEM, using RHEED with very small incident angle enables high sensitivity to nanocrystal structure, and the resolution of STM is sufficiently high to detect nanometer size crystallites. The charging, discharging, and retention behaviors of the MOS capacitor nanocrystal memory structures were investigated by capacitance-voltage ͑C -V͒ measurements. The results obtained from both structural and electrical characterization are combined for complete analysis of nanocrystal floating gate memory devices made via Si ion implantation.The samples investigated consist of 15 nm dry oxide grown on p-type silicon substrate ͑N A =3ϫ 10 18 cm −3 ͒ implanted with 5 keV Si + ions to a fluence of 1.27 ϫ 10 16 cm −2 . The samples were annealed at 1080°C for 5 min in an atmosphere containing 2 % O 2 to allow formation of Si nanocrystals. Control samples without implantation were fabricated with the same structure and treated with the same condition as samples with nanocrystals. Cross-sectional high resolution...

Floating nanodot gate memory fabrication with biomineralized nanodot as charge storage node

“…The flatband shifts to positive and negative voltage directions are frequently observed in Si nanocrystal ͑NC͒ based FNGM devices, and such shifts are attributed to the electron and hole confinement to the Si-NC floating gate. 28,29 We also confirmed the bias polarity dependent opposite charge confinement to the discrete Co-BND with monitoring surface potential change by using Kelvin probe force microscopy ͑KFM͒. 30 Isolated Co-BND deposited on Si substrate varies the polarity of its surface potential depending on the polarity of applied substrate bias.…”

Silicon optical nanocrystal memory

“…The presence of Si nanocrystals in the oxide layer was independently verified using vacuum scanning tunneling microscopy measurements on samples in which the oxide layer of the gate stack was partially removed with buffered HF. 17 From these measurements, we determine that the areal density of nanocrystals forming the floating gate array is at least ϳ4 ϫ 10 12 /cm 2 that the nanocrystals are ϳ2 -4 nm in diameter. A maximum bound on the areal density can be derived from the total fluence of implanted silicon ions and is estimated to be within an order of magnitude of our lower bound.…”

“…The presence of Si nanocrystals in the oxide layer was independently verified using vacuum scanning tunneling microscopy measurements on samples in which the oxide layer of the gate stack was partially removed with buffered HF. 17 From these measurements, we determine that the areal density of nanocrystals forming the floating gate array is at least ϳ4 ϫ 10 12 /cm 2 and a) Electronic …”

Charge retention characteristics of silicon nanocrystal layers by ultrahigh vacuum atomic force microscopy

“…In our previous work, 8 the structure characterization was provided by UHV scanning tunneling microscopy ͑STM͒ measurements on samples in which a thin oxide layer was fully etched with buffered hydrofluoric acid. Areal density of nanocrystals was found to be at least about 4 ϫ 10 12 cm −2 .…”