Probabilistic miss equations: evaluating memory hierarchy performance

Abstract

The increasing gap between processor and main memory speeds makes the role of the memory hierarchy behavior in the system performance essential. Both hardware and software techniques to improve this behavior require good analysis tools that help predict and understand such behavior. Analytical modeling arises as a good choice in this field due to its high speed if its traditional limited precision is overcome. We present a modular analytical modeling strategy for arbitrary set-associative caches with LRU replacement policy. The model differs from all the previous related works in its probabilistic approach. Both perfectly and nonperfectly nested loops as well as reuse between different nests are considered by this model, so it makes the analysis of complete programs with regular computations feasible. Moreover, the model achieves good levels of accuracy while being extremely fast and flexible enough to allow its extension. Our approach has been extensively validated using well-known benchmarks. Finally, the model has also proven its ability to drive code optimizations even more successfully than current production compilers.

Automatic Tuning of Discrete Fourier Transforms Driven by Analytical Modeling

“…Models are particularly useful for larger problem sizes, where the performance is strongly impacted by the memory hierarchy. Several cache models have been proposed, including the Cache Miss Equations [9], the Presburger formula based approach in [10], the Stack Distances Model [11], and the Probabilistic Miss Equations [12]. All of these models support loop nests with regular access patterns similar to the ones considered in this paper.…”

“…The performance modeling approach successfully used in [11], [4], [12], [5] estimates the execution time as the sum of the time spent in the CPU and the time lost due to …”

“…Among the models available to characterize the memory hierarchy we have chosen the Probabilistic Miss Equations (PME) [12] because their probabilistic nature can accommodate the modeling of non deterministic situations such as the placement of virtual pages in physical memory, as we will see in Section IV-B. We will first explain the basics of the model, closely following [12], and then introduce the extensions developed to improve its accuracy by considering the physical indexing of the second level cache, and the hardware prefetching units.…”

“…The Probabilistic Miss Equations (PME) model [12] provides fast and accurate predictions of the memory behavior in caches with an LRU replacement policy. The model is based on the idea that cache misses take place the first time a memory line is accessed (compulsory miss) and each time a new access does not find the line in the cache because it has been replaced since the previous time it was accessed (interference miss).…”

“…For example, the access to N regions of the same size T separated by a constant stride S, called S r (N, T, S), suffices to represent all the accesses found in many DFT codes. Details of the method to derive its AV for virtuallyindexed caches can be found in [12].…”