Printed Machine Learning Classifiers

Mubarik, Muhammad Husnain; Weller, Dennis D.; Bleier, Nathaniel; Tomei, Matthew; Aghassi‐Hagmann, Jasmin; Tahoori, Mehdi B.; Kumar, Rakesh

doi:10.1109/micro50266.2020.00019

Cited by 20 publications

(66 citation statements)

References 61 publications

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“…There have been various domain-specific FPGA and ASIC accelerators proposed for neural networks [31]- [56]. Many of them leverage the sparsity to improve performance [57]- [73].…”

Section: B Accelerators For Sparse and Quantized Neural Networkmentioning

confidence: 99%

SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning

Wang

Zhang

Han

2020

Preprint

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The attention mechanism is becoming increasingly popular in Natural Language Processing (NLP) applications, showing superior performance than convolutional and recurrent architectures. However, general-purpose platforms such as CPUs and GPUs are inefficient when performing attention inference due to complicated data movement and low arithmetic intensity. Moreover, existing NN accelerators mainly focus on optimizing convolutional or recurrent models, and cannot efficiently support attention. In this paper, we present SpAtten, an efficient algorithm-architecture co-design that leverages token sparsity, head sparsity, and quantization opportunities to reduce the attention computation and memory access. Inspired by the high redundancy of human languages, we propose the novel cascade token pruning to prune away unimportant tokens in the sentence. We also propose cascade head pruning to remove unessential heads. Cascade pruning is fundamentally different from weight pruning since there is no trainable weight in the attention mechanism, and the pruned tokens and heads are selected on the fly. To efficiently support them on hardware, we design a novel top-k engine to rank token and head importance scores with high throughput. Furthermore, we propose progressive quantization that first fetches MSBs only and performs the computation; if the confidence is low, it fetches LSBs and recomputes the attention outputs, trading computation for memory reduction.Extensive experiments on 30 benchmarks show that, on average, SpAtten reduces DRAM access by 10.0× with no accuracy loss, and achieves 1.

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“…There have been various domain-specific FPGA and ASIC accelerators proposed for neural networks [31]- [56]. Many of them leverage the sparsity to improve performance [57]- [73].…”

Section: B Accelerators For Sparse and Quantized Neural Networkmentioning

confidence: 99%

SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning

Wang

Zhang

Han

2020

Preprint

View full text Add to dashboard Cite

show abstract

“…The sub-cent cost requirements of such domains cannot be met by silicon technologies, which feature high manufacturing and testing costs. Printed electronics (PE) based on maskless and additive processes have emerged to overcome this obstacle, which offer significant cost reductions [1]. Printed electronics additionally offer stretchability, flexibility and porosity benefits, which are infeasible for silicon devices [2].…”

Section: Introductionmentioning

confidence: 99%

“…Note however, that PE elements are manufactured at the micrometer (um) scale and therefore cannot compete with their siliconbased counterparts (manufactured at nanometer scale) in terms of performance or power and area efficiency. Though, lowvoltage printed electronics are envisioned to enable batterypowered, or even self-powered devices for the aforementioned application domains [1].…”

Section: Introductionmentioning

confidence: 99%

“…Many of these application domains can be greatly enhanced by machine learning (ML) classification algorithms, such as Support Vector Machines (SVM), Decision Trees (DT), Random Forests (RF) etc. Due to the low non-recurring engineering (NRE) costs and per unit-area fabrication costs of PE, the implementation of highly customizable on-demand printed bespoke ML classifiers, tailored for specific architecture and datasets on a given application, is feasible [1]. Bespoke ML architectures [3] offer considerable area reduction, since the trained parameters of the implemented model are hard-wired, thus simplifying the respective circuitry.…”

Section: Introductionmentioning

confidence: 99%

“…In this work, we utilize the principles of approximate computing to explore the area efficiency of ML classification algorithms for printed technologies. More specifically, we focus on Decision Trees because of their proven ability to implement low-power and hardware-efficient bespoke circuits [1]. By leveraging AC techniques, we are able to trade-off negligible classification accuracy loss of bespoke ML architectures for large reduction in area overhead.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Approximate Decision Trees For Machine Learning Classification on Tiny Printed Circuits

Balaskas¹,

Zervakis²,

Siozios³

et al. 2022

Preprint

Self Cite

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Although Printed Electronics (PE) cannot compete with silicon-based systems in conventional evaluation metrics, e.g., integration density, area and performance, PE offers attractive properties such as on-demand ultra-low-cost fabrication, flexibility and non-toxicity. As a result, it targets application domains that are untouchable by lithography-based silicon electronics and thus have not yet seen much proliferation of computing. However, despite the attractive characteristics of PE, the large feature sizes in PE prohibit the realization of complex printed circuits, such as Machine Learning (ML) classifiers. In this work, we exploit the hardware-friendly nature of Decision Trees for machine learning classification and leverage the hardware-efficiency of the approximate design in order to generate approximate ML classifiers that are suitable for tiny, ultra-resource constrained, and battery-powered printed applications.

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Hardware–Software Co-design for Ultra-Resource-Constrained Embedded Machine Learning Inference: A Printed Electronics Use Case

Zervakis,

Tahoori,

Henkel

2023

Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing

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Printed Machine Learning Classifiers

Cited by 20 publications

References 61 publications

SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning

SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning

Approximate Decision Trees For Machine Learning Classification on Tiny Printed Circuits

Hardware–Software Co-design for Ultra-Resource-Constrained Embedded Machine Learning Inference: A Printed Electronics Use Case

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