Principles of Sequential-Equivalence Verification

Mneimneh, Maher; Sakallah, Karem A.

doi:10.1109/mdt.2005.68

Cited by 21 publications

(7 citation statements)

References 5 publications

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“…Sequential Equivalence Checking: This refers to formally proving the functional equivalence of designs that may in general have sequentially different implementations [1].…”

Section: Performance Validation Methodologymentioning

confidence: 99%

Leveraging semi-formal and sequential equivalence techniques for multimedia SOC performance validation

Bhatia

Gaur

Tiwari

et al. 2007

Proceedings of the 44th Annual Conference on Design Automation - DAC '07

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For multimedia SOCs supporting real time, high throughput and data intensive applications, performance validation of memory subsystems is needed to uncover the bottlenecks in the RTL implementation. Traditional validation techniques are either too slow, non-exhaustive (like performance simulations or running pseudo applications on FPGA platforms), or are not accurate enough to guarantee conformance (like abstract interpretation and analysis). In this paper we present an approach for performance validation which uses (a) semi-formal techniques rather than pure simulation for providing a wider coverage, (b) actual RTL implementations wherever available for more accurate analysis, and (c) sequential equivalence checking for validating the abstract models for IP's whose RTL is either not present or from which datapath has been abstracted out. We illustrate this approach using two case studies from video signal processing platforms. In the first study, performance issues found in silicon were detected using the proposed approach, and in the second study a number of performance bottlenecks were detected much before the RTL was frozen.

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“…Sequential Equivalence Checking: This refers to formally proving the functional equivalence of designs that may in general have sequentially different implementations [1].…”

Section: Performance Validation Methodologymentioning

confidence: 99%

Leveraging semi-formal and sequential equivalence techniques for multimedia SOC performance validation

Bhatia

Gaur

Tiwari

et al. 2007

Proceedings of the 44th Annual Conference on Design Automation - DAC '07

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“…Different notions of sequential equivalence have been proposed including Sequential Hardware Equivalence(SHE) [17], Safe Replacement and Delay Replacement [18], Three-valued Safe Equivalence [19], etc. We first introduce the notion of SHE in the next subsection.…”

Section: Notions Of Equivalencementioning

confidence: 99%

Sufficiency-based filtering of invariants for Sequential Equivalence Checking

Nguyêݱn

Hsiao

2011

2011 IEEE International High Level Design Validation and Test Workshop

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“…The generalized problem where matching of sequential elements cannot be assumed is referred to as sequential equivalence checking, which is an active area of research [4], [5], [6], [7]. Sequential equivalence checking is much harder than combinational equivalence checking, so any algorithms for proving sequential equivalence may fail due to resource limitations.…”

Section: A Equivalence Checkingmentioning

confidence: 99%

Preparing Rearchitected Designs for Sequential Equivalence Checking

Nodine¹

2008

2008 Ninth International Workshop on Microprocessor Test and Verification

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This paper describes a tool called rapport which prepares rearchitected designs for sequential equivalence checking. This tool is applicable when an existing "golden" design is optimized for higher performance. Without such a tool, the optimizations would need to remain within single module boundaries, since equivalence checking tools require a one-to-one mapping between ports when proving two designs are equivalent. The tool is also able to handle arbitrary encodings of reference signals to produce design signals and retiming of signals.

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Principles of Sequential-Equivalence Verification

Cited by 21 publications

References 5 publications

Leveraging semi-formal and sequential equivalence techniques for multimedia SOC performance validation

Leveraging semi-formal and sequential equivalence techniques for multimedia SOC performance validation

Sufficiency-based filtering of invariants for Sequential Equivalence Checking

Preparing Rearchitected Designs for Sequential Equivalence Checking

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