Preventing scan-based side-channel attacks through key masking

Ahlawat, Satyadev; Vaghani, Darshit; Singh, Virendra

doi:10.1109/dft.2017.8244434

Cited by 1 publication

(3 citation statements)

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“…This would in turn deliver a much more comprehensive protection against not only scan attacks but also reverse engineering, IP piracy, Trojan insertion, etc. The techniques in [23], [24] aim at protecting the scan access into the crypto cores based on a weaker threat model that assumes access to a working chip only; however, they are easily breakable in the threat model defined in this and all other logic locking papers where the locked netlist is also assumed to be available to an attacker.…”

Section: Security Comparisonmentioning

confidence: 99%

“…On the other hand, attempts at thwarting SAT attack focused on restricting unauthorized scan access. This branches down to either obfuscating the scan chains [20], [21], or blocking the scan chain access entirely [22], [23], [24]. In [20], Karmakar et al proposed obfuscating the stimuli and test patterns by inserting key gates into the scan chain.…”

Section: Introductionmentioning

confidence: 99%

“…DefenseAttack (App)SAT[6],[19] Removal[13] ScanSAT[25] Shift&leak SSTC[24],[23] EFF + RLL[20] DFS + SLL[22] MSSD + RLL into a key-leaking state by leveraging shift operations.The attack framework utilizes synthesis and automatic test pattern generation (ATPG) tools to leak key bits one at a time.• We propose a pre-processing step to boost our shift-andleak attack. This involves launching a SAT attack in a restricted scan access setting.…”

mentioning

confidence: 99%

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Is Robust Design-for-Security Robust Enough? Attack on Locked Circuits with Restricted Scan Chain Access

Limaye

Sengupta

Nabeel

et al. 2019

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

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The security of logic locking has been called into question by various attacks, especially a Boolean satisfiability (SAT) based attack, that exploits scan access in a working chip. Among other techniques, a robust design-for-security (DFS) architecture was presented to restrict any unauthorized scan access, thereby, thwarting the SAT attack (or any other attack that relies on scan access). Nevertheless, in this work, we successfully break this technique by recovering the secret key despite the lack of scan access. Our security analysis on a few benchmark circuits protected by the robust DFS architecture demonstrates the effectiveness of our attack; on average ∼95% of the key bits are correctly recovered, and almost 100% in most cases. To overcome this and other prevailing attacks, we propose a defense by making fundamental changes to the robust DFS technique; the new defense can withstand all logic locking attacks. We observe, on average, lower area overhead (∼1.65%) than the robust DFS design (∼5.15%), and similar test coverage (∼99.88%).

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Section: Security Comparisonmentioning

confidence: 99%