Prefetching in a texture cache architecture

Igehy, Homan; Eldridge, Matthew; Proudfoot, Kekoa

doi:10.1145/285305.285321

Cited by 79 publications

(35 citation statements)

References 11 publications

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“…Finally, it can be combined with a hardware rendering pipeline, functioning in that context like a mipmap texture cache. We believe that many observations made in previous texture caching papers [7,2,10] could be applied in our algorithm, which has similar (but not identical) characteristics. For example, both texture caching and our algorithm perform better when the access pattern exhibits good coherence.…”

Section: Discussionmentioning

confidence: 87%

Inverse texture synthesis

et al. 2008

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Search-based texture synthesis algorithms are sensitive to the order in which texture samples are generated; different synthesis orders yield different textures. Unfortunately, most polygon rasterizers and ray tracers do not guarantee the order with which surfaces are sampled. To circumvent this problem, textures are synthesized beforehand at some maximum resolution and rendered using texture mapping.We describe a search-based texture synthesis algorithm in which samples can be generated in arbitrary order, yet the resulting texture remains identical. The key to our algorithm is a pyramidal representation in which each texture sample depends only on a fixed number of neighboring samples at each level of the pyramid. The bottom (coarsest) level of the pyramid consists of a noise image, which is small and predetermined. When a sample is requested by the renderer, all samples on which it depends are generated at once. Using this approach, samples can be generated in any order. To make the algorithm efficient, we propose storing texture samples and their dependents in a pyramidal cache. Although the first few samples are expensive to generate, there is substantial reuse, so subsequent samples cost less. Fortunately, most rendering algorithms exhibit good coherence, so cache reuse is high.

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Section: Discussionmentioning

confidence: 87%

Inverse texture synthesis

et al. 2008

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“…We read from three mipmap levels whereas trilinear interpolation reads from only two levels and it is likely that GPUs optimize for trilinear accesses by using two caches for alternate mipmap levels [Igehy et al 1998], and that reading from three levels causes cache conflicts. GPUs are also likely to optimize for the 2×2 quads of texels accessed by a trilinear interpolant, whereas our fetches are less regular.…”

Section: Resultsmentioning

confidence: 99%

Cardinality-constrained texture filtering

Manson

Schaefer

2013

ACM Trans. Graph.

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2 pixels using (b) an exact Lánczos filter, (c) an eight texel approximation using our method, and (d) trilinear interpolation applied to a Lánczos filtered mipmap. Our approximation produces an image that is nearly the same as the exact filtered image while using the same number of texels as trilinear interpolation. AbstractWe present a method to create high-quality sampling filters by combining a prescribed number of texels from several resolutions in a mipmap. Our technique provides fine control over the number of texels we read per texture sample so that we can scale quality to match a memory bandwidth budget. Our method also has a fixed cost regardless of the filter we approximate, which makes it feasible to approximate higher-quality filters such as a Lánczos 2 filter in real-time rendering. To find the best set of texels to represent a given sampling filter and what weights to assign those texels, we perform a cardinality-constrained least-squares optimization of the most likely candidate solutions and encode the results of the optimization in a small table that is easily stored on the GPU. We present results that show we accurately reproduce filters using few texel reads and that both quality and speed scale smoothly with available bandwidth. When using four or more texels per sample, our image quality exceeds that of trilinear interpolation.

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“…Once the pruning is done, subsequent arcs can be prefetched while previously fetched arcs are being processed in the next pipeline stages. Figure 6 shows our prefetching architecture for the Arc cache, which is inspired by the design of texture caches for GPUs [25]. Texture fetching exhibits similar characteristics to the arcs fetching, as all the texture addresses can also be computed much in advance from the time the data is required.…”

Section: A Hiding Memory Latencymentioning

confidence: 99%

An ultra low-power hardware accelerator for automatic speech recognition

Yazdani¹,

Segura²,

Arnau³

et al. 2016

2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

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Abstract-Automatic Speech Recognition (ASR) is becoming increasingly ubiquitous, especially in the mobile segment. Fast and accurate ASR comes at a high energy cost which is not affordable for the tiny power budget of mobile devices. Hardware acceleration can reduce power consumption of ASR systems, while delivering high-performance.In this paper, we present an accelerator for large-vocabulary, speaker-independent, continuous speech recognition. It focuses on the Viterbi search algorithm, that represents the main bottleneck in an ASR system. The proposed design includes innovative techniques to improve the memory subsystem, since memory is identified as the main bottleneck for performance and power in the design of these accelerators. We propose a prefetching scheme tailored to the needs of an ASR system that hides main memory latency for a large fraction of the memory accesses with a negligible impact on area. In addition, we introduce a novel bandwidth saving technique that removes 20% of the off-chip memory accesses issued during the Viterbi search.The proposed design outperforms software implementations running on the CPU by orders of magnitude and achieves 1.7x speedup over a highly optimized CUDA implementation running on a high-end Geforce GTX 980 GPU, while reducing by two orders of magnitude (287x) the energy required to convert the speech into text.

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Prefetching in a texture cache architecture

Cited by 79 publications

References 11 publications

Inverse texture synthesis

Inverse texture synthesis

Cardinality-constrained texture filtering

An ultra low-power hardware accelerator for automatic speech recognition

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