1997
DOI: 10.1109/19.571879
|View full text |Cite
|
Sign up to set email alerts
|

Predetermination of the quantization error in digital measurement systems

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Year Published

2000
2000
2018
2018

Publication Types

Select...
4
1

Relationship

0
5

Authors

Journals

citations
Cited by 8 publications
(1 citation statement)
references
References 2 publications
0
1
0
Order By: Relevance
“…However, as modern digital phase-locked loops have negligible settling time (few tens of μs [24]), and can provide the same number of samples per period of the measured signal, it is sufficient to simulate the measurement of average RP at 50 Hz (from the perspective of the SDDFT processor, the constant number of samples per period is equivalent to the situation when the frequency is constant). For that purpose, we have used the method described in [23]. In the first step, we have modeled the SDDFT processor that measures four Fourier coefficients:…”
Section: B Simulation Resultsmentioning
confidence: 99%
“…However, as modern digital phase-locked loops have negligible settling time (few tens of μs [24]), and can provide the same number of samples per period of the measured signal, it is sufficient to simulate the measurement of average RP at 50 Hz (from the perspective of the SDDFT processor, the constant number of samples per period is equivalent to the situation when the frequency is constant). For that purpose, we have used the method described in [23]. In the first step, we have modeled the SDDFT processor that measures four Fourier coefficients:…”
Section: B Simulation Resultsmentioning
confidence: 99%