Precoder/two-stage equaliser for block-based single-carrier transmission with insufficient guard interval

Abstract

Proposed is a zero-inserting precoder and a two-stage linear equaliser, to shorten the guard interval in block-based single-carrier modulation. The first-stage equaliser consists of a linear single-tapper-subcarrier frequency-domain equaliser. The second-stage equaliser maximises the SINR, in the time-domain, based on the interference-plus-noise estimated from the zero-padded sub-intervals of the single-carrier modulation. This proposed scheme is applicable even without cyclic prefixing.

A single‐input multiple‐output transceiver architecture to ‘Blindly’ null unknown interference for block‐based single‐carrier transmission with an insufficient guard interval

“…3 Motivation behind the single-input singleoutput (SISO) transceiver architecture in [9] For SC-BB-CP transmission, [9] recently proposes a precoder/equalizer transceiver architecture that shortens the CP to reduce the transmission overhead. Please refer to the schematic in Fig.…”

“…There, P number of zero-energy symbol-periods are inserted into a block of N − P number of information-bearing symbol-periods, such that whatever is received during these P zero-energy symbol-periods can only be the signal-of-interest's self-interference and/or any Fig. 1 The zero-inserting precoder and the two-stage equalizer, proposed in [9]. This schematic first appeared in [9] adjacent-channel interference and/or additive noise (I + N )the same interference/noise that degrades the N − P number of information-bearing symbol-periods, which contain the signal-of-interest plus interference and noise (S + I + N ).…”

“…1 The zero-inserting precoder and the two-stage equalizer, proposed in [9]. This schematic first appeared in [9] adjacent-channel interference and/or additive noise (I + N )the same interference/noise that degrades the N − P number of information-bearing symbol-periods, which contain the signal-of-interest plus interference and noise (S + I + N ). The 'SINR-Maximiser' block in Fig.…”

“…For the algorithmic details, please kindly refer to [9] itself. This single-input single-output transceiver architecture in [9] can shorten the CP by more than the zero-energy symbol-periods inserted, thereby producing a net reduction in the overhead, but (unrealistically) require prior knowledge of the statistics of the self-interference, adjacent interference, and additive noise.…”

“…This eigen-based space-time beamforming improves over the second stage of the SISO transceiver proposed in [9], which requires (unrealistically) prior information about the interference and noise.…”