Precise Visual Inspection of LSI Wafer Patterns by Local Perturbation Pattern Matching Algorithm

This paper reports on an image processing algorithm and hardware for fast, precise inspection of LSI wafer patterns. In order to detect deep sub-micron defects such as 0.2 pm at high speed by grayscale image comparison, we must overcome the sampling errors that inevitably occur between two images during detection. For this purpose, we have developed a subpixel image alignment algorithm that infers the correct sampling position and creates the two resampled images with subpixel accuracy. We have also developed an 8-channel pipelined processor with gate arrays. It has 8 x 19,000 gates and can operate at 8 x 15 MHz. Evaluation of the system conjirmed that the accuracy of the subpixel image alignment was 0.16 pixels or less and that the inspection system could detect 0.1 8 pm defects at a pixel size of 0.25 pm for half-micron LSI wafer patterns with an inspection speed of 2.5 slcm2.

show abstract

“…the pixel element of the image sensor. Therefore we get images from equation (9) as shown in Fig. 9.…”

Section: Evaluation Of the Subpixel Image Alignmentmentioning

confidence: 99%

“…The subpixel image alignment unit includes a statistical value calculation circuit that corresponds to 2C&y, etc. in equation (8), a d , and dYo calculation circuit corresponding to equation (8), and a resampling circuit corresponding to equation (9). These units operate at every 256 rasters.…”

Section: Hardware Implementationmentioning

confidence: 99%

Precise visual inspection for LSI wafer patterns using subpixel image alignment

Hiroi

Maeda

Kubota

et al.

Proceedings of 1994 IEEE Workshop on Applications of Computer Vision

View full text Add to dashboard Cite

show abstract

“…[1] Systems using these techniques are highly sophisticated and have been improved in specific field of application. Such systems include high-speed pattern inspection systems that detect the alignment of small areas in block images using a hardware circuit or processor; [2][3][4][5] aerospace imaging systems in which two long stripes with gradual registration amounts are offset using previous alignment results; [6] aerospace imaging systems that detect registration in images by interpolating registration amount with respect to ground control points with known registration; [7] and medical systems that use multiple windows to interpolate registration amount in an image with high distortion. [8] Recent trends show that the memory capacity of large-scale integration (LSI) devices quadruples every 3 years, and the design specification has reached the 0.1 m level.…”

Section: Introductionmentioning

confidence: 99%

Pattern alignment method based on consistency among local registration candidates for LSI wafer pattern inspection

Hiroi

Shishido

Watanabe

Sixth IEEE Workshop on Applications of Computer Vision, 2002. (WACV 2002). Proceedings.

View full text Add to dashboard Cite

This paper reports an image-processing algorithm for robust inspection of LSI wafer patterns using SEM. In order to detect defects in a regular LSI pattern, a pair of long patterns are compared, blocked images are aligned, and defects are judged using the aligned images. The LSI wafer pattern is defined to consist of blank space, fine repetitive patterns, and unique patterns. Distortion of the SEM image is larger than the repetitive pattern pitch, requiring the system to keep track of the alignment in areas without pattern information or in blank space and mitigate the indeterminacy of repetitive patterns. To satisfy these requirements, a two-layer algorithm is proposed. The lower layer calculates registration candidates in each block, and the upper layer determines the correct registration route, i.e. the chain of the correct registration, using candidate information in all the related blocks. Experimental evaluations confirm that most pattern cases can be inspected correctly using the proposed SEM inspection system.

show abstract

Model‐based defect detection in multidimensional vector spaces

Honda

Obara

Harada

et al. 2012

Elect Comm in Japan

View full text Add to dashboard Cite

Abstract222222222222222A highly sensitive inspection algorithm is proposed that extracts defects in multidimensional vector spaces from multiple images. The proposed algorithm projects subtraction vectors calculated from test and reference images to control the noise by reducing the dimensionality of vector spaces. The linear projection vectors are optimized using a physical defect model, and the noise distribution is calculated from the images. Because the noise distribution varies with the intensity or texture of the pixels, the target image is divided into small regions and the noise distribution of the subtraction images are calculated for each divided region. The bidirectional local perturbation pattern matching (BD‐LPPM), which is an enhanced version of the LPPM, is proposed to increase the sensitivity when calculating the subtraction vectors, especially when the reference image contains more high‐frequency components than the test image. The proposed algorithm is evaluated using defect samples for three different scanning electron microscopy images. The results reveal that the proposed algorithm increases the signal‐to‐noise ratio by a factor of 1.32 relative to that obtained using the Mahalanobis distance algorithm. © 2012 Wiley Periodicals, Inc. Electron Comm Jpn, 95(9): 44–53, 2012; Published online in Wiley Online Library (wileyonlinelibrary.com). DOI 10.1002/ecj.11390

show abstract

Precise Visual Inspection of LSI Wafer Patterns by Local Perturbation Pattern Matching Algorithm

Cited by 6 publications

References 3 publications

Precise visual inspection for LSI wafer patterns using subpixel image alignment

Precise visual inspection for LSI wafer patterns using subpixel image alignment

Pattern alignment method based on consistency among local registration candidates for LSI wafer pattern inspection

Model‐based defect detection in multidimensional vector spaces

Contact Info

Product

Resources

About