Pre-testing Flash Device Driver through Model Checking Techniques

Kim, Moonzoo; Kim, Yun-Ho; Choi, Yunja; Kim, Hotae

doi:10.1109/icst.2008.55

Cited by 10 publications

(4 citation statements)

References 14 publications

(4 reference statements)

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“…The authors modelled the basic operations of filesystem as well as other features that are crucial to NAND flash hardware, such as wear-leveling and erase-unit reclamation. Papers [16,15,17,18] document experiments in the formal verification of OneNAND TM Flash Memory which is a trademark of Samsung Electronics.…”

Section: Verification Of Flash Memory Behaviourmentioning

confidence: 99%

Linking a state-rich process algebra to a state-free algebra to verify software/hardware implementation

Beg

Butterfield

2010

Proceedings of the 8th International Conference on Frontiers of Information Technology

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Following the development of formalisms based on data and behavioural aspects of the system, there are number of attempts in which these two formalisms are mixed together to get benefit of both paradigms. 'Circus' being a living specification language with continuous collaboration from both academia and industry, is a combination of Z, CSP and the refinement calculus. To make use of the available and industry-proven tools for a particular programming paradigm, there is a need to develop a formally verified link between the one world and the other. The aim of this work is to develop a formally verified link between a state-rich process algebra i.e. 'Circus' to a state-free process algebra i.e. CSP. To achieve the research goal, the most suitable available tools are to identify. For developing link between targeted formal languages, we will identify the key translations required between the two languages. For ensuring correctness of the translation, we will formalise the key translation / refinement steps. These will form the theoretical core of the work and support the soundness of the link. In the end, we will select and verify a case study from the collection of software / hardware protocols.

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Section: Verification Of Flash Memory Behaviourmentioning

confidence: 99%

Linking a state-rich process algebra to a state-free algebra to verify software/hardware implementation

Beg

Butterfield

2010

Proceedings of the 8th International Conference on Frontiers of Information Technology

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“…Through the various experiments carried out to analyze MSR, including conventional testing [16], concolic testing, and model checking [15], we found that it is important to build an accurate and efficient environment model for the analysis of a flash file system. Also, it was found that different analysis techniques can commonly use the same environment model.…”

Section: Importance Of An Environment Modelmentioning

confidence: 99%

“…The outermost loop iterates over LUs of data (line 2-18) until the numScts amount of the logical sectors are read completely. The second outermost loop iterates until the LS's of the current LU are completely read (line [5][6][7][8][9][10][11][12][13][14][15][16]. The third loop iterates over PUs mapped to the current LU (line 7-15).…”

Section: Multi-sector Read Operationmentioning

confidence: 99%

Concolic testing of the multi-sector read operation for flash storage platform software

Kim

Choi

2012

Form. Asp. Comput.

Self Cite

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Abstract. In today's information society, flash memory has become a virtually indispensable component, particularly for mobile devices. In order for mobile devices to operate successfully, it is essential that flash memory be controlled correctly through file system software. However, as is typical for embedded software, conventional testing methods often fail to detect hidden flaws in the software due to the difficulty of creating effective test cases. As a different approach, model checking techniques guarantee a complete analysis, but only on a limited scale. In this paper, we describe an empirical study wherein a concolic testing method is applied to the multi-sector read operation for a flash memory. This method combines a symbolic static analysis and a concrete dynamic analysis to automatically generate test cases and perform exhaustive path testing accordingly. In addition, we analyze the advantages and weaknesses of the concolic testing approach on the domain of the flash file system compared to model checking techniques.

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“…Formal model-checking techniques have been applied to the verification of the Samsung OneNAND flash device driver [KCKK08], with particular emphasis on a multi-sector read operation implemented within the FTL. This proved too complex for "conventional testing methods" 2 to the extent that even when tests failed, they were not adequate to pinpoint the cause of the error.…”

Section: Related Workmentioning

confidence: 99%

Concurrent Models of Flash Memory Device Behaviour

Butterfield

Catháin

2009

Lecture Notes in Computer Science

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Abstract. We present a CSP model of the internal behaviour of Flash Memory, based on its specification by the Open Nand-Flash Interface (ONFi) consortium. This contributes directly to the low-level modelling of the data-storage technology that is the target of the POSIX filestore mini-challenge. The key objective was to ensure that the internal behaviour was well-specified, and that it was consistent with the specification of the external interface of such devices. The FDR toolkit was used to perform the revelent refinement/model-checking. In addition to uncovering errors and possible sources of misinterpretation in the ONFi standard, this work also describes a methodology for model data-entry based on a "state-chart" dialect of XML (SCXML) using XSLT to translate into CSP, and HTML, to support validation.

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Pre-testing Flash Device Driver through Model Checking Techniques

Cited by 10 publications

References 14 publications

Linking a state-rich process algebra to a state-free algebra to verify software/hardware implementation

Linking a state-rich process algebra to a state-free algebra to verify software/hardware implementation

Concolic testing of the multi-sector read operation for flash storage platform software

Concurrent Models of Flash Memory Device Behaviour

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