Practical Partial Order Reduction for CSP

Gibson−Robinson, Thomas; Hansen, Henri; Roscoe, A. W.; Wang, Xu

doi:10.1007/978-3-319-17524-9_14

Cited by 17 publications

(11 citation statements)

References 14 publications

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“…There has been significant earlier research on the use of partial order reduction to model check LTSs (or the closely related concept of process algebras); see, e.g., [14,16,[30][31][32][33]35]. To understand how this previous work relates to this paper, we must explain a subtle, but important, distinction concerning how a property is specified.…”

Section: Related Workmentioning

confidence: 99%

Action-Based Model Checking: Logic, Automata, and Reduction

Siegel

Yan

2020

Computer Aided Verification

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Stutter invariant properties play a special role in state-based model checking: they are the properties that can be checked using partial order reduction (POR), an indispensable optimization. There are algorithms to decide whether an LTL formula or Büchi automaton (BA) specifies a stutter-invariant property, and to convert such a BA to a form that is appropriate for on-the-fly POR-based model checking. The interruptible properties play the same role in action-based model checking that stutter-invariant properties play in the state-based case. These are the properties that are invariant under the insertion or deletion of "invisible" actions. We present algorithms to decide whether an LTL formula or BA specifies an interruptible property, and show how a BA can be transformed to an interrupt normal form that can be used in an on-the-fly POR algorithm. We have implemented these algorithms in a new model checker named McRERS, and demonstrate their effectiveness using the RERS 2019 benchmark suite.

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Section: Related Workmentioning

confidence: 99%

Action-Based Model Checking: Logic, Automata, and Reduction

Siegel

Yan

2020

Computer Aided Verification

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“…D-Finder 2 implements three techniques to calculate these invariants: a boolean-constraint-based (DF2pm), a fixed-point-based (DF2fp), and an enumerative one (DF2l). Also, when appropriate, we combine FDR4's explicit state exploration with partial order reduction (FDRp) [GRHRW15] or compression techniques (FDRc) [RGG + 95]. While SDD proves a property that is stronger than local-deadlock freedom, D-Finder 2 and FDR4 methods check only for deadlock freedom.…”

Section: Practical Evaluationmentioning

confidence: 99%

“…Correspondence and offprint requests to: P. Antonino, E-mail: prgantonino@gmail.com; pedro.antonino@cs.ox.ac.uk Many techniques to tackle the state-space explosion problem have been invented: most notably partialorder reductions [GW93,GRHRW15,Val92,Pel93], compression techniques (or, compositional reachability analysis) [RGG + 95, YY91], symbolic state-space representation [POR12, BCCZ99, BCM + 92] and counterexample-guided abstraction refinement (CEGAR) [CGJ + 00, CCO + 05]. They employ different mechanisms to reduce the state space to be explored or represent it more efficiently.…”

Section: Introductionmentioning

confidence: 99%

Efficient verification of concurrent systems using local-analysis-based approximations and SAT solving

2019

Self Cite

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This work develops a type of local analysis that can prove concurrent systems deadlock free. As opposed to examining the overall behaviour of a system, local analysis consists of examining the behaviour of small parts of the system to yield a given property. We analyse pairs of interacting components to approximate system reachability and propose a new sound but incomplete/approximate framework that checks deadlock and local-deadlock freedom. By replacing exact reachability by this approximation, it looks for deadlock (or local-deadlock) candidates, namely, blocked (locally-blocked) system states that lie within our approximation. This characterisation improves on the precision of current approximate techniques. In particular, it can tackle non-hereditary deadlock-free systems, namely, deadlock-free systems that have a deadlocking subsystem. These are neglected by most approximate techniques. Furthermore, we demonstrate how SAT checkers can be used to efficiently implement our framework, which, typically, scales better than current techniques for deadlock-freedom analysis. This is demonstrated by a series of practical experiments.

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“…Many techniques for tackling the state-space explosion problem have been invented; most notably partial-order reductions [47,48,67,79], compression techniques (or, compositional reachability analysis) [75,81], symbolic state-space representation [21,24,66] and counterexample-guided abstraction refinement (CEGAR) [27,29]. These techniques employ different mechanisms to reduce the search space to be explored but they have in common their quest for a (sufficiently) precise reduction/abstraction of the original space.…”

Section: Introductionmentioning

confidence: 99%

Efficient Verification of Concurrent Systems Using Synchronisation Analysis and SAT/SMT Solving

Antonino

Gibson−Robinson

Roscoe

2019

ACM Trans. Softw. Eng. Methodol.

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This paper investigates how the use of approximations can make the formal verification of concurrent system scalable. We propose the idea of synchronisation analysis to automatically capture global invariants and approximate reachability. We calculate invariants on how components participate on global system synchronisations and use a notion of consistency between these invariants to establish whether components can effectively communicate to reach some system state. Our synchronisationanalysis techniques try to show either that a system state is unreachable by demonstrating that components cannot agree on the order they participate in system rules, or that a system state is unreachable by demonstrating components cannot agree on the number of times they participate on system rules. These fully automatic techniques are applied to check deadlock and local-deadlock freedom in the PairStatic framework. It extends Pair (a recent framework where we use pure pairwise analysis of components and SAT checkers to check deadlock and local-deadlock freedom) with techniques to carry out synchronisation analysis. So, not only can it compute the same local invariants that Pair does, it can leverage global invariants found by synchronisation analysis, thereby improving the reachability approximation and tightening our verifications. We implement PairStatic in our DeadlOx tool using SAT/SMT and demonstrate the improvements they create in checking (local-)deadlock freedom. CCS Concepts: • Theory of computation → Concurrency; Invariants; • Software and its engineering → Model checking; Automated static analysis;

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Practical Partial Order Reduction for CSP

Cited by 17 publications

References 14 publications

Action-Based Model Checking: Logic, Automata, and Reduction

Action-Based Model Checking: Logic, Automata, and Reduction

Efficient verification of concurrent systems using local-analysis-based approximations and SAT solving

Efficient Verification of Concurrent Systems Using Synchronisation Analysis and SAT/SMT Solving

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