Practical Implementation of A Real-time Human Detection with HOG-AdaBoost in FPGA

Adiono, Trio; Prakoso, Kevin Shidqi; Putratama, Christoporus Deo; Yuwono, Bramantio

doi:10.1109/tencon.2018.8650453

Cited by 5 publications

(3 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Another technique like the Histogram Oriented Gradients (HOG) actually can be used as a method for face recognition application [12][13][14][15]. Facial recognition is a method for character recognition on faces that are successfully detected.…”

Section: Introductionmentioning

confidence: 99%

Attendance System using Machine Learning-based Face Detection for Meeting Room Application

Muttaqin¹,

Nopendri²,

Mulyana³

2020

IJACSA

Self Cite

View full text Add to dashboard Cite

In a modern meeting room, a smart system to make attendance quickly is mandatory. Most of the existing systems perform manual attendance, such as registration and fingerprint. Despite the fingerprint method can reject the Unknown person and give the grant access to the Known person, it will take time to register first a person one-by-one. Moreover, it is possible to create long queues for fingerprint checking before entering the meeting room. Machine learning, along with the Internet of Things (IoT) technology is the best solution; it offers many advantages when applied in the meeting rooms. Generally, the method used is to create a presence by detecting faces. In this paper, we present a facial recognition authentication based on machine learning technology for connection to the meeting rooms. Furthermore, specific website to display the detection result and data storage design testing is developed. The method uses 1) the Dlib library for deep learning purposes, 2) OpenCV for video camera processing, and 3) Face Recognition for Dlib processing. The proposed system allows placing the multiple cameras in a meeting room as needed. However, in this work, we only used one camera as the main system. Tests conducted include identification of one Known person, identification of one Unknown person, identification of two people, and three people. The parameter to be focused is the required time in detecting the number of faces recorded by the camera. The results reveal that the face can be recognized or not recognized, then it will be displayed on the website.

show abstract

Section: Introductionmentioning

confidence: 99%

Attendance System using Machine Learning-based Face Detection for Meeting Room Application

Muttaqin¹,

Nopendri²,

Mulyana³

2020

IJACSA

Self Cite

View full text Add to dashboard Cite

show abstract

“…To date, there are many papers on FPGA-based HOG that implemented in Xillix FPGA for high-speed and highaccuracy human detection systems [6][7][8][9][10]. In previous work [11], we have applied the FPGA-based human recognition in an image, we employed ALTERA DE2-115. The results indicate that the humans are succesfully detected from a particular image with 1280 x 1024 resolutions and frame rate with 129 FPS.…”

Section: Introductionmentioning

confidence: 99%

“…In that case, we used INRIA database. In [11], we also compared the other related works with our architecture and also investigated its power consumption of FPGA using Altera's Power Analyzer when performing as human detector system. However, the paper discussion is a lack of the results analysis when the image viewed from different angles using various databases, e.g.…”

Section: Introductionmentioning

confidence: 99%

HOG-AdaBoost Implementation for Human Detection Employing FPGA ALTERA DE2-115

Adiono¹,

Prakoso²,

Putratama³

et al. 2018

ijacsa

Self Cite

View full text Add to dashboard Cite

Human detection system using Histogram of Oriented Gradients (HOG) feature and AdaBoost classifier (HOG-AdaBoost) in FPGA ALTERA DE2-115 are presented in this paper. This work is expanded version from our previous study. This paper discusses 1) the HOG performance in detecting human from a passive images with other point-of-views (30 deg., 40 deg., 50 deg., 60 deg. and up to 70 deg.); 2) FPS test with various image sizes (320 x 240, 640 x 480, 800 x 600, and 1280 x 1024); 3) re-measurement the FPGA's power consumption and 4) simulate the architecture in RTL. We used three databases as a parameter for test purpose, i.e. INRIA, MIT, and Daimler.

show abstract

Analysis and Comparison of FPGA-Based Histogram of Oriented Gradients Implementations

Ghaffari

Soleimani

et al. 2020

IEEE Access

View full text Add to dashboard Cite

One of the commonly-used feature extraction algorithms in computer vision is the histogram of oriented gradients. Extracting the features from an image using this algorithm requires a large amount of computations. One way to boost the speed is to implement this algorithm on field programmable gate arrays, to benefit from flexible designs such as parallel computing. In this paper, we first, provide a summary of the steps of the histogram of oriented gradients algorithm. We then survey the implementation techniques of the histogram of oriented gradients on field-programmable gate arrays in the past decade. We group the different techniques into four main categories and analyze various enhancement methods in each category. The first group is the optimization of the algorithm computation which involves the steps of input selection, magnitude calculation, orientation and bin assignment, and normalization. The second category is data manipulation techniques which include numerical representation, data flow modification, and memory optimization. The third group contains modified features based on the histogram of oriented gradients and their hardware implementation, and the fourth one is the implementations in hardware-software co-design of the algorithm. We compare the different implementations using a speed metric called pixels per clock cycle, and resource utilization. Finally, we provide design summary tables for efficient implementation with respect to the speed metric, accuracy, and resource utilization. INDEX TERMS Histogram of oriented gradients, field programmable gate arrays, hardware acceleration, hardware design. KIN FUN LI is the Director of the two highly sought-after professional master of engineering programs in telecommunications and information security (MTIS) and applied data science (MADS) at the University of Victoria, Canada, where he teaches both hardware and software courses in the Department of Electrical and Computer Engineering. He dedicates his time to instructing and researching in computer architecture, hardware accelerators, education analytics, and data mining applications. He is actively involved in the organization of many international conferences, including the biennial IEEE Pacific Rim in Victoria and the internationally held IEEE AINA. He is also a passionate supporter and participant in numerous international activities to promote the engineering profession, education, and diversity.

show abstract

Practical Implementation of A Real-time Human Detection with HOG-AdaBoost in FPGA

Cited by 5 publications

References 12 publications

Attendance System using Machine Learning-based Face Detection for Meeting Room Application

Attendance System using Machine Learning-based Face Detection for Meeting Room Application

HOG-AdaBoost Implementation for Human Detection Employing FPGA ALTERA DE2-115

Analysis and Comparison of FPGA-Based Histogram of Oriented Gradients Implementations

Contact Info

Product

Resources

About