Power loss modelling and efficiency optimization of a multi-output Flyback converter

Cacciotto, Fabio; Sciortino, Mirko; Termini, Danilo; Cacciato, M.; Rizzo, Santi Agatino; Scelba, G.

doi:10.1109/iecon48115.2021.9589886

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Simulation Analysis Of the Node Ringing Reduction1

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2023

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“…For the purposes of evaluation, which procedure represents effective solution for the node ringing reduction, it was decided to design the verified simulation model with high level of accuracy [10][11][12]. For this purpose, the development of the PSpice circuit was performed utilizing highly accurate models of power transistors (ST microelectronics -STL135N8F7AG), which are equipped within physical prototype, as well.…”

Section: Simulation Analysis Of the Node Ringing Reductionmentioning

confidence: 99%

Node Ringing Reduction of Synchronous Buck Converter

Frivaldský,

Pčola,

Biel

et al. 2023

Communications

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This paper discusses the issue related to the switching regulators operated at high switching frequencies, where it is necessary to eliminate the influence of parasitic components of the converter's main circuit. In more detail it deals with the node-ringing phenomena, which is typical for synchronous buck converters. The existence of the parasitic inductances arising from the printed circuit board conductive paths, induce voltages, which are several times higher than nominal input voltage, thus it increases the risk of damage of the power transistors. Therefore, optimization of the circuit is required to reduce the voltage spikes and therefore improve safety margin related to nominal operation. In this paper, node-ringing phenomena is introduced, while the optimization methodologies for its reduction are described and verified by experimental analysis.

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Section: Simulation Analysis Of the Node Ringing Reductionmentioning

confidence: 99%