Power-Efficient Asynchronous Design

Abstract

The potential advantage of low power consumption is one of the main reasons why asynchronous logic attracts attention from both industrial and academic circles. A number of low-power asynchronous designs have been proposed since the 1990s. In this paper, an attempt is made to compare the power-efficiency of asynchronous and synchronous designs, and to evaluate low-power asynchronous techniques.20th International Conference on VLSI Design (VLSID'07) 0-7695-2762-0/07 $20.00 © 2007 20th International Conference on VLSI Design (VLSID'07) 0-7695-2762-0/07 $20.00