Power cycling methods for SiC MOSFETs

Herold, Christian; Sun, Jiangtao; Seidel, Peter; Tinschert, Lukas; Lutz, Josef

doi:10.23919/ispsd.2017.7988994

Cited by 79 publications

(47 citation statements)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…An option mentioned by different authors is the use of Temperature Sensitive Electrical Parameters (TSEPs) [32,33] for detecting the degradation of the packaging of the device. Different researchers have cited the use of the MOSFET body diode conduction characteristics as a TSEP since there is a well-known temperature dependence of the forward voltage, for example in [34,35]. As it is a widely used TSEP, it is important to evaluate how the stress of the gate oxide will affect its accuracy as temperature indicator.…”

Section: B Considerations For Condition Monitoringmentioning

confidence: 99%

“…Firstly, the degradation of the gate oxide can affect the accuracy of VSD as a TSEP as was already mentioned in [36], especially if it is measured at VGS=0. Biasing the device at negative voltage minimizes the impact of the threshold voltage shift and the body effect on the temperature sensitivity of VSD [35,37,38], however the impact of biasing the device at a negative voltage could be adverse on the reliability of the gate oxide. The change in VTH can also affect other TSEPs like the turn-ON dI/dt [39] and the threshold voltage itself [24].…”

Section: B Considerations For Condition Monitoringmentioning

confidence: 99%

See 1 more Smart Citation

A Novel Non-Intrusive Technique for BTI Characterization in SiC mosfets

Gonzalez

Alatise

2019

IEEE Trans. Power Electron.

View full text Add to dashboard Cite

Threshold voltage (VTH) shift due to Bias Temperature Instability (BTI) is a well-known problem in SiC MOSFETs that occurs due to oxide traps in the SiC/SiO2 gate interface. The reduced band offsets and increased interface/fixed oxide traps in SiC MOSFETs makes this a more critical problem compared to silicon. Before qualification, power devices are subjected to gate bias stress tests after which VTH shift is monitored. However, some recovery occurs between the end of the stress and VTH characterization, thereby potentially underestimating the extent of the problem. In applications where the SiC MOSFET module is turned OFF with a negative bias at high temperature, if the VTH shift is severe enough, there may be electrothermal failure due to current crowding since parallel devices lose synchronization during turn-ON. In this paper, a novel method that uses the forward voltage of the body diode during reverse conduction of a small sensing current is introduced as a technique for monitoring VTH shift and recovery due to BTI. This non-invasive method exploits the increased body effect that is peculiar to SiC MOSFETs due to the higher body diode forward voltage. With the proposed method, it is possible to non-invasively assess VTH shift dynamically during BTI characterization tests.

show abstract

Section: B Considerations For Condition Monitoringmentioning

confidence: 99%

Section: B Considerations For Condition Monitoringmentioning

confidence: 99%

A Novel Non-Intrusive Technique for BTI Characterization in SiC mosfets

Gonzalez

Alatise

2019

IEEE Trans. Power Electron.

View full text Add to dashboard Cite

show abstract

“…In the case of a PiN diode like the parasitic body diode of a MOSFET [20], at low currents, the forward voltage decreases with temperature as its temperature dependency is inversely proportional to the intrinsic carrier concentration, which increases with temperature. It is a widely used TSEP [21] for example for determining the thermal impedance during power cycling tests [20,22,23].…”

Section: B Body Diode Voltagementioning

confidence: 99%

“…In both [22,23] the use of a negative voltage is recommended for using the body diode voltage as TSEP, in order to minimize the impact of the threshold voltage shift caused by BTI on the junction temperature measurement.…”

Section: B Body Diode Voltagementioning

confidence: 99%

Impact of the Gate Oxide Reliability of SiC MOSFETs on the Junction Temperature Estimation Using Temperature Sensitive Electrical Parameters

Gonzalez

Alatise

2018

2018 IEEE Energy Conversion Congress and Exposition (ECCE)

View full text Add to dashboard Cite

Bias temperature instability (BTI) is more problematic in SiC power MOSFETs due to the occurrence of higher interface state traps and fixed oxide traps compared to traditional silicon MOS interfaces where there are no carbon atoms degrading the atomically smooth Si/SiO2 interface. The use of temperature sensitive electrical parameters (TSEPs) for measuring the junction temperature and enabling health monitoring based on junction temperature identification is a promising technique for increasing the reliability of power devices, however in the light of increased BTI in SiC devices, this must be carefully assessed. This paper evaluates how BTI of SiC power MOSFETs under high temperature gate bias stresses affects the electrical parameters used as TSEPs and its impact on condition monitoring.

show abstract

“…6(a) show. Hence, it is highly recommended that VSD is measured with a negative VGS if VSD is to be used as a TSEP, as was also stated in [13]. In the case of PBTI, at VGS= 0V, the shift of the calibration curve is +0.20 V while at VGS= -4 V the increase is +0.03 V. For the NBTI measurements, the shifts are -0.84 V and -0.54 V for VGS = 0 V and VGS =-4 V respectively.…”

Section: Body Diode Voltage As Indicator Of Vth Shiftmentioning

confidence: 99%