Power Converter Half-bridge Models in the Light of Real-time FPGA Implementation

Alsarayreh, Saif; Suto, Z.

doi:10.1109/pemc48073.2021.9432622

Cited by 3 publications

(4 citation statements)

References 16 publications

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“…Switching power losses arising from numerical integration are acknowledged despite their absence in the physical domain. During modelling, it was noted in a prior work [11] that switching losses occurred due to inaccuracies in circuit parameters. Nevertheless, a thorough examination of this occurrence still needs to be undertaken.…”

Section: Switch Discrete Model Continuous Modelmentioning

confidence: 99%

“…Also, in the n + 1 time step, the switch is in the ON state, Csw is replaced by Lsw, and the initial energy stored in the inductor is calculated using Equation (11). The energy stored in the capacitor goes to zero in the OFF-ON state transition of the switch:…”

Section: Switch Discrete Model Continuous Modelmentioning

confidence: 99%

“…One significant advantage of this methodology is that irrespective of the switch's state the conductance may be fixed by appropriately choosing a suitable time interval. Therefore, the circuit configuration may remain unchanged [9,11]. Additionally, the utilisation of the backward Euler (BE) integration method, renowned for its inherent damping characteristics, will lead to the discretisation of the elements inside the converter circuit and the derivation of the circuit's matrix.…”

Section: Case Studiesmentioning

confidence: 99%

“…Define a specific topology for the switching converter prior to discretization, to do state-space analysis Formulate the state matrix (A) and discretize it to achive (A') using equation (11) Utilise the ABC (Artificial Bee Colony), GA (Genetic Algorithm), and FFA (Firefly Algorithm) optimisation algorithms to derive the optimal parameters values of ADC switchbased model.…”

Section: End Startmentioning

confidence: 99%

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Optimal Selection of Switch Model Parameters for ADC-Based Power Converters

Alsarayreh,

Sütő

2023

Energies

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Real-time hardware-in-the-loop-(HIL) simulation integration is now a fundamental component of the power electronics control design cycle. This integration is required to test the efficacy of controller implementations. Even though hardware-in-the-loop-(HIL) tools use FPGA devices with computing power that is rapidly evolving, developers constantly need to balance the ease of deploying models with acceptable accuracy. This study introduces a methodology for implementing a full-bridge inverter and buck converter utilising the associate-discrete-circuit-(ADC) model, which is optimised for real-time simulator applications. Additionally, this work introduces a new approach for choosing ADC parameter values by using the artificial-bee-colony-(ABC) algorithm, the firefly algorithm (FFA), and the genetic algorithm (GA). The implementation of the ADC-based model enables the development of a consistent architecture in simulation, regardless of the states of the switches. The simulation results demonstrate the efficacy of the proposed methodology in selecting optimal parameters for an ADC-switch-based full-bridge inverter and buck converter. These results indicate a reduction in overshoot and settling time observed in both the output voltage and current of the chosen topologies.

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Section: Switch Discrete Model Continuous Modelmentioning

confidence: 99%

Section: Switch Discrete Model Continuous Modelmentioning

confidence: 99%

Section: Case Studiesmentioning

confidence: 99%

Section: End Startmentioning

confidence: 99%

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