Power‐aware scheduling with effective task migration for real‐time multicore embedded systems

Abstract

SUMMARYA major design issue in embedded systems is reducing the power consumption since batteries have a limited energy budget. For this purpose, several techniques such as Dynamic Voltage Scaling (DVS) or task migration are being used. DVS allows reducing power by selecting the optimal voltage supply, while task migration achieves this effect by balancing the workload among cores. This paper focuses on power-aware scheduling allowing task migration to reduce energy consumption in multicore embedded systems implementing DVS capabilities. To address energy savings, the devised schedulers follow two main rules: migrations are allowed at specific points of time and only one task is allowed to migrate each time. Two algorithms have been proposed working under real-time constraints. The simpler algorithm, namely, Single Option Migration (SOM) only checks just one target core before performing a migration. In contrast, the Multiple Option Migration (MOM) searches the optimal target core. In general, the MOM algorithm achieves better energy savings than the SOM algorithm, although differences are wider for a reduced number of cores and frequency/voltage levels. Moreover, the MOM algorithm reduces energy consumption as much as 40% over the typical WF algorithm.

Energy-Efficient Scheduling of Urgent Bag-of-Tasks Applications in Clouds through DVFS

“…Eyerman and Eeckhout [5] and March et al [6] propose techniques for fine grain control of frequency and voltage at the CPU level. Eyerman and Eeckhout [5] explores regulation of frequency to slow down the flow of CPU instructions through CPU units (such as buffers and functional units) in the event of cache misses that disrupt the flow of execution of operations being processed.…”

“…Eyerman and Eeckhout [5] explores regulation of frequency to slow down the flow of CPU instructions through CPU units (such as buffers and functional units) in the event of cache misses that disrupt the flow of execution of operations being processed. March et al [6] apply DVFS and task migrations to balance load among CPU cores, what in some circumstances enables the whole CPU to execute at a lower frequency/voltage. These approaches are complementary to ours, as they operate at the CPU level whereas our approach is applied at middleware/Operating System level.…”

“…This means that maximum frequency levels to be assigned during tasks execution are supplied by our algorithm. If our approach is combined with DVFS techniques applied at the CPU level to manage frequency for operation at the microinstruction level [5], [6], even more savings could be expected. Experiments are presented that demonstrate that our algorithm significantly reduces energy consumption with the extra feature of not requiring virtual machines to have knowledge about its underlying physical host, which is an assumption of previous solutions for the problem.…”

An Effective Resource Partitioning Heuristic for Embedded Applications on an MPSoC

“…Vaidya et al [18] proposed a dynamic scheduling algorithm based on hosting the scheduler on all cores of a multi-core processor and accesses a shared Task Data Structure (TDS) to pick up ready-to-execute tasks. Power and energy efficient scheduling on multicore systems has been studied in [19] and [20]. Suhendra et al [21] and Salamy [22] studied the problem of integrating task scheduling and memory partitioning among a heterogeneous multiprocessor system on chip with scratch pad memory.…”

“…On the other hand, if the number of available processing cores in our system is less than the requested cores, then it will effectively divide the available cores among the competing embedded applications. This is mainly done in lines (15)(16)(17)(18)(19)(20)(21)(22) where competing applications will receive cores in a way such that applications with higher DP values will be allocated number of processing cores closer to what they requested. A good value for α in the processing heuristic in Figure 5 is 0.1 which is found through fine tuning.…”