Power aware HEVC streaming for mobile

Abstract

Mobile devices, increasingly equipped with high capability processors and connected with fast wireless networks, have become a major consumer of multi-media content. Limited battery life on mobile devices makes power saving a critical factor in delivering a good user experience. This paper proposes a power aware streaming system that combines the emerging High Efficiency Video Coding (HEVC) standard and the Dynamic Adaptive Streaming over HTTP (DASH) standard. The proposed system uses power aware HEVC encoding technologies and client side power adaptation logic to adaptively control power consumption on the client device. The proposed power aware HEVC streaming system can improve quality of experience by setting full-length video playback as client' s objective. Demonstration of the proposed power aware HEVC system is available on the ASUS Transformer Xfinity (TF700T) tablet using an ARM processor. Index Terms-HEVC, DASH, battery life, power saving, video streaming, video coding the information about the video being rendered, such as the decoding complexity level of the video segment, the current power dissipation rate, and remaining playback time. In the prototype implementation, instead of MP4 encapsulation, raw HEVC elementary bitstreams are used at the server side. 3. POWER A WARE ENCODING Compared to H.264/AVC, HEVC uses larger video blocks. The size of the largest video blocks, also called the coding tree blocks (CTB), is signaled in the Sequence Parameter Set (SPS). Each CTB is quadtree partitioned into coding units (CU) with variable sizes. Each CU consists of prediction units (PU) and transfonn units (TU). Complexity analyses of HEVC decoder implementations have been made available in [3] [5] ; it is reported that, in the random access encoding configuration with hierarchical B prediction [13] , typically motion compensation (MC), deblocking, and entropy decoding take about 50%, 20%, and 20% of the overall decoding time, respectively. Profiling of our HEVC decoder implementation on ARM showed similar results. Based on this observation, the power aware HEVC encoder in the proposed system considers motion compensation and deblocking when generating bitstreams with different complexity levels. In HEVC, I-D interpolation filters are applied when fractional motion vectors are used (up to 114-pel precision); the interpolation filters are 7-and 8-tap for luma and 4-tap for chroma. Depending on the fractional positions of the motion vectors, the memory size fetched for MC, number of filters applied, as well as the filter symmetry can be

Decoding-Complexity-Aware HEVC Encoding Using a Complexity–Rate–Distortion Model

“…However, these as well as device oriented [4] and battery-aware [5] adaptive multimedia delivery schemes are typically restricted to manipulating basic video coding parameters such as QP, spatial resolution, frame rate and scalable bit streams [22] to adapt video content to achieve energy savings. In fact, although energy-aware HEVC streaming solutions [6] do exist, they are limited to prediction mode and motion vector selection. As a result, diverse coding features available in the more modern coding standards remain unexploited, and the approach itself can suffer from variability of the perceived video quality with time.…”

“…with two state-of-the-art approaches; a tunable HEVC decoder proposed by Nogues et al [7] and the power-aware encoding algorithm proposed by He et al [6]. The CIF and HD video sequences used in this experiments are encoded using random access configuration with QPs 22, 27, 32, and 37.…”

“…The encoding algorithm proposed by He et al [6] attempts to reduce the complexity of the filtering operations during motion compensation and the de-blocking operation performed by the decoder. In this context, the energy optimized motion vector selection algorithm (PUM) and the de-blocking filter disabling algorithm (DBLK) produce a bit stream which demonstrates a moderate complexity reduction as seen in the Table I and decoding complexity, distortion curves in Fig.…”

“…Hence, despite the 12% and 7% BD-C reduction achieved by the algorithm, its applicability is limited due to the bit rate increase required to achieve similar quality to the HM 16.0 encoded bit streams. Furthermore, the lack of the detailed decoding complexity model and the QP agnostic trade-off factor selection in [6] results in a poor BD-C reduction and increased loss of coding efficiency. In addition, the algorithm by He et al [6] requires the communication of the de-blocking filter decisions to the decoder, which requires additional overhead as either multiple Picture Parameter Set (PPS) Network Abstraction Layer (NAL) units or metadata must be exchanged between the encoder and decoder.…”

“…More state-of-the-art solutions manipulate the motion compensation and in-loop filtering operations in HEVC [6] [7] or adopt Dynamic Voltage and Frequency Scaling (DVFS) [8] - [11] techniques to reduce the decoder's power consumption. However, the state-of-the-art methods in the literature do not exploit the variations of the computational complexity that exist between different decoding operations to determine the optimum coding parameters at the encoder itself.…”