Porous Silicon Fabrication and Surface Cracking Behavior Research Based on Anodic Electrochemical Etching^▴

Abstract

Porous silicon (PSi) was fabricated based on anodic electrochemical etching, and the relationship between preparation conditions, nanostructure and PSi surface crack behavior were systematically studied. The effects of silicon wafer resistivity (doping concentration), etching time, and etching current density on nanostructure of PSi were investigated. Results indicated that lower resistivity was beneficial to etching process and led to higher porosity with uniform nano‐channels, and surface crack was more intense during drying process. Thickness and porosity of the porous layer are both initially increased and then decreased with increasing etching time. Direction of capillary stress depended on pore geometry, which further affected crack shape (shrinkage or crimp) of surface layer of PSi. Cracking extent was controlled by porosity, that the surface cracking layer began to peel off when the porosity exceeded 70%. Finally, a geometry and porosity‐controlled model was proposed to describe the cracking behaviors of PSi surface layer.

Incorporation of Zinc Oxide on Macroporous Silicon Enhanced the Sensitivity of Macroporous Silicon MSM Photodetector

“…During the process, the sample was illuminated with a 60 W bulb to promote more hole carriers which contributed in the oxidation and dissolution of the Si material at the pore tips. 28,29 Then, RF sputtering (Auto HHV 500 Sputter Coater) of 13.56 MHz, power of 100 W and the coating rate was (0.8 to 1.0 Å s −1 ) was used to deposit a 200 nm thin ZnO seed layer on mPS as a template to assist the growth during chemical bath deposition (CBD). The CBD was carried out to grow ZnO using equimolar concentration of 0.01 M for both (Zn(NO 3 ) 2 .H 2 O and C 6 H 12 N 4 for 5 h, the solution turns milky as the ZnO nucleate and deposited on the substrate in binder oven.…”

Nanopore Formation at the Junctions of the Polycrystal Intergranular Boundary Under Plastic Deformation

“…For the formation of such porous surfaces, as a rule, high-quality single-crystalline material is used [21], [22]. Among the most common methods for forming porous layers are electrochemical etching [23], photoelectrochemical etching [24], and photolithography [25]. All these methods are aimed at artificially creating pores in a homogeneous material [26].…”

Influence of different etching methods on the structural properties of porous silicon

“…On the contrary, wet etching has shown more advantages as it requires simple equipment and low processing temperatures, producing little structural damage, alongside being versatile and more cost effective than dry etching methods. Some of the wet etching methods that are generally used to fabricate porous Si include electroless etching (Vajpeyi et al , 2005) and direct current photo-assisted electrochemical (DCPEC) etching (Yang et al , 2021). Electroless etching is an etching method where the nano-structures are fabricated unselectively on the whole Si and catalysed by metals without an external bias (Brahiti et al , 2012).…”

“…However, this technique often produces non-uniform pores (Yam and Hassan, 2009). On the other hand, the photo-assisted electrochemical etching method using a DC or DCPEC as the power supply has gained more interest from many researchers (Atta et al , 2021; Yang et al , 2021) than the electroless etching in fabricating porous structures due to the controllability over the etching process by varying the etching parameters. However, the DCPEC method has a disadvantage in which this etching method produces hydrogen bubbles that can hinder the etching process and result in non-uniform pore formation, lower etching rates and a low density of pores (Naderi and Hashim, 2012a, 2012b).…”