1999
DOI: 10.1116/1.581708
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Polysilicon thin film transistors fabricated on low temperature plastic substrates

Abstract: We present device results from polysilicon thin film transistors (TFTs) fabricated at a maximum temperature of 100 °C on polyester substrates. Critical to our success has been the development of a processing cluster tool containing chambers dedicated to laser crystallization, dopant deposition, and gate oxidation. Our TFT fabrication process integrates multiple steps in this tool, and uses the laser to crystallize deposited amorphous silicon as well as create heavily doped TFT source/drain regions. By combinin… Show more

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Cited by 95 publications
(32 citation statements)
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“…This is presumably due to the very short dwell time at T4T M so that the limited thermal budget is insufficient to cause damage to the polymer substrate. Similar conclusions, based on one-dimensional heat flow calculations, were reached for the irradiation of a-Si on PET substrates [14], showing that also in this case the substrate temperature during the laser pulse goes well above the PET softening point but only for few tens of ms.…”
Section: Active Layer Crystallizationsupporting
confidence: 58%
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“…This is presumably due to the very short dwell time at T4T M so that the limited thermal budget is insufficient to cause damage to the polymer substrate. Similar conclusions, based on one-dimensional heat flow calculations, were reached for the irradiation of a-Si on PET substrates [14], showing that also in this case the substrate temperature during the laser pulse goes well above the PET softening point but only for few tens of ms.…”
Section: Active Layer Crystallizationsupporting
confidence: 58%
“…Lab (UK) [12,13] and followed by the groups at Lawrence Livermore National Lab. [14], Sony [15], Electronics and Telecommunications Research Institute (ETRI) [16][17][18], Samsung Advanced Institute of Technology (SAIT) [19][20][21], Korea Electronics Technology Institute (KETI) [22,23] and at University of Rennes [24,25], ultra-low-temperature polycrystalline silicon (ULTPS) devices were demonstrated. In particular, among the ultra-low T M substrates PES has been the most used [12,13,15,[17][18][19][20][21][22][23], for its excellent surface quality, optical transparency and relatively high maximum processing temperature (200-220 1C).…”
Section: Methodsmentioning
confidence: 99%
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“…To realize conformable transistor backplanes, electronic materials compatible with ultra low process temperatures are needed. These materials include hydrogenated amorphous silicon (a-Si:H) [1,2], excimer laser crystallized polycrystalline silicon [3][4][5], and organic thin film transistors (TFTs) [6][7][8]. We have been exploring hydrogenated nanocrystalline silicon (nc-Si:H) based on its (i) high electron field effect mobilities compared to aSi:H, (ii) capability of p-channel operation, (iii) low process temperature, (iv) compatibility with current aSi:H technology, and (v) insensitivity to light-induced defect generation [9].…”
Section: Introductionmentioning
confidence: 99%
“…These transparent displays allow for information to appear where it was previously impossible to display information. Many research efforts have been addressed to obtain transparent and flexible semiconductors, mainly based on hydrogenated amorphous silicon [17][18][19][20], organic semiconductors [18][19][20][21][22][23][24][25], and novel semiconducting materials, such as the In-Ga-Zn-O system deposited on polyethylene terephthalate [26].…”
Section: Resultsmentioning
confidence: 99%