PMU-Trojan: On exploiting power management side channel for information leakage

Islam, Nazmul; Kundu, Sandip

doi:10.1109/aspdac.2018.8297405

Cited by 9 publications

(7 citation statements)

References 17 publications

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“…In research, risks posed by side channels are often of interest. For example, CPU power management sensor data have been used to leak Advanced Encryption Standard (AES) keys [19]. If power management sensors are strong enough to leak cryptographic keys, it is reasonable to believe that those same side channels might also be used to create robust application fingerprints.…”

Section: B Hardware Sensorsmentioning

confidence: 99%

MADFAM: MicroArchitectural Data Framework and Methodology

et al. 2022

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In the aftermath of Spectre and Meltdown researchers have proposed a variety of attack detection solutions by applying machine learning to data collected from hardware performance monitoring units. Although many microarchitectural attack detection systems provide high-accuracy detection results, the behavior of the underlying data collection mechanisms is not well described or understood. This research introduces the MicroArchitectural Data Framework And Methodology (MADFAM) to prescribe a systematic approach to collecting and preserving the information available in sequences of microarchitectural data. The proposed framework focuses on hardware performance counters (HPCs) as the primary data source. HPC configuration is complex, which makes it difficult for others to reproduce results or advance the stateof-the-art. This framework includes a description of design decisions that HPC research must consider across an array of problem domains, including information security. MADFAM proposes a data collection architecture and evaluation criteria to improve the discussion about the experimental settings and design decisions used in HPC research. The proposed framework evaluation criteria are then used to establish a baseline characterization of time series data that future research can use to compare alternative framework implementations.

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Section: B Hardware Sensorsmentioning

confidence: 99%

MADFAM: MicroArchitectural Data Framework and Methodology

et al. 2022

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“…E.g., Operating Systems (OS) based on Linux have CPUfreq software, which can set the frequency for each core. This software can be accessed with the kernel privileges to implement the attack [11], [13], [26], [27]. Additionally, the location of the source and sink significantly affects the bandwidth of communication signal due the different level of coupling between cores.…”

Section: Threat Modelmentioning

confidence: 99%

“…The amplitude variation of voltages at various nodes when the information is sent from load R 1 , R 2 , R 3 is shown in Figs. [13][14][15], respectively. It should be noted that the amplitude variation at the source side is not included in these figures because of significantly larger amplitude value as is shown in Figs.…”

Section: Simulation Of Covert Communicationmentioning

confidence: 99%

“…9-12. The relationship between the amplitude variations and the switching frequency of SC converter can be observed from Figs. [13][14][15]. The amplitude ∆V for each node increases Amplitude V (mV) with switching frequency of SC converter and then saturates at FSL region.…”

Section: Simulation Of Covert Communicationmentioning

confidence: 99%

“…The use of dynamic voltage and frequency scaling (DVFS) allowed to create a covert channel in a TrustZone-enabled system-on-chip (SoC) [12]. Information leakage is enabled by infecting power management unit with a hardware Trojan in the multi-core SoC in [13]. The power budget constraint [14] and switching noise modulation [15] of power delivery network (PDN) can also create the covert communication between cores of the processor.…”

Section: Introductionmentioning

confidence: 99%

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Modeling and Analysis of Switched-Capacitor Converters as a Multi-port Network for Covert Communication

Mustafa,

Köse

2021

Preprint

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Switched-capacitor (SC) DC-DC voltage converters are widely used in power delivery and management of modern integrated circuits. Connected to a common supply voltage, SC converters exhibit cross-regulation/coupling effects among loads connected to different SC converter stages due to the shared components such as switches, capacitors, and parasitic elements. The coupling effects between SC converter stages can potentially be used in covert communication, where two or more entities (e.g., loads) illegitimately establish a communication channel to exchange malicious information stealthily. To qualitatively analyze the coupling effects, a novel modeling technique is proposed based on the multi-port network theory. The fast and slow switching limit (FSL and SSL) equivalent resistance concepts are used to analytically determine the impact of each design parameter such as switch resistance, flying capacitance, switching frequency, and parasitic resistance. A three-stage 2:1 SC converter supplying three different loads is considered as a case study to verify the proposed modeling technique.

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