Platform-based software design flow for heterogeneous MPSoC

Abstract

Current multimedia applications demand complex heterogeneous multiprocessor architectures with specific communication infrastructure in order to achieve the required performances. Programming these architectures usually results in writing separate low-level code for the different processors (DSP, microcontroller), implying late global validation of the overall application with the hardware platform. We propose a platform-based software design flow able to efficiently use the resources of the architecture and allowing easy experimentation of several mappings of the application onto the platform resources. We use a high-level environment to capture both application and architecture initial representations. An executable software stack is generated automatically for each processor from the initial model. The software generation and validation is performed gradually corresponding to different software abstraction levels. Specific software development platforms (abstract models of the architecture) are generated and used to allow debugging of the different software components with explicit hardware-software interaction. We applied this approach on a multimedia platform, involving a high performance DSP and a RISC processor, to explore communication architecture and generate an efficient executable code for a multimedia application. Based on automatic tools, the proposed flow increases productivity and preserves design quality. ; Pier Stanislao Paolucci, ATMEL Roma Advanced DSP,

Multiprocessor Systems on Chip

“…The goal of the ROSES [141] framework and its extensions [232] is to increase IP component reuse and enhance software and hardware design. Following the paradigm of component-based platform design, it provides tools and mechanisms to easily assemble simulation models at high abstraction level, but also on RTL.…”

Extending IP-XACT to support an MDE based approach for SoC design

“…Intermediate abstraction levels are used to allow software generation, simulation and debug. The multilevel design flow proposed in [10] defines four abstraction levels starting from the system level and getting to the Cycle accurate level. We will focus in the third abstraction level called "Transaction Accurate" for three main reasons: (1) this abstraction level is the one that immediately precedes the RTL level (2) it represent the easiest level to integrate within the current IP-XACT specification (3) and it is interesting for the design because of the simulation results obtained in [10].…”

“…The simulation at this level allows validating the integration of the application with the OS and the communication layer. It may also provide precise information about the communication performances [10].…”

“…(The same applies for software port). The complete Meta-model is shown in Fig 3. It covers the needs for the expression of a TA model used in [10]. An IP-XACT extension for modeling at the TA Level is composed of two files; the fisrt one is an XML schema called "ta_library.xsd" which contains the definition of specific components to be used at this level.…”

A mobile multimedia network terminal based on MPSoC

“…Mobile multimedia network terminal plays an important role in NGI applications. Multiprocessor System on Chip (MPSoC) architecture has become an attractive solution to the increasingly complex embedded applications which require both high performance and flexible programmability [1] [2] [3]. Based on the above mentioned situation, it can be predicted that there is a growing demand for handheld devices in the future.…”