A novel gate insulator consisting of silicon dioxide (SiO2) with a thin silicon (Si) interfacial layer has been investigated for high-power microwave indium phosphide (InP) metal-insulator-semiconductor field effect transistors (MISFETs). The role of the silicon interfacial layer on the chemical nature of the SiO2/Si/InP interface was studied by high-resolution x-ray photoelectron spectroscopy. The results indicated that the silicon interfacial layer reacted with the native oxide at the InP surface, thus producing silicon dioxide, while reducing the native oxide which has been shown to be responsible for the instabilities in InP MISFETs. While a 1.2 V hysteresis was present in the capacitance-voltage (C-V) curve of the MIS capacitors with silicon dioxide, less than 0.1 V hysteresis was observed in the C-V curve of the capacitors with the silicon interfacial layer incorporated in the insulator. InP MISFETs fabricated with the silicon dioxide in combination with the silicon interfacial layer exhibited excellent stability with drain current drift of less than 3% in 104 s as compared to 15-18% drift in 104 s for devices without the silicon interfacial layer. High-power microwave InP MISFETs with Si/SiO2 gate insulators resulted in an output power density of 1.75 W/ram gate width at 9.7 GHz, with an associated power gain of 2.5 dB and 24% power added efficiency.Indium phosphide (InP) offers excellent potential for high-speed, high-frequency, and high-power microwave device applications (1, 2) due to its material properties. InP has a higher peak electron drift and saturation velocity than gallium arsenide (GaAs). The electric field at which the peak electron drift velocity occurs is also higher for InP. Further, the InP thermal conductivity and breakdown field are higher than in GaAs, which makes it more suitable for high-power microwave applications. More importantly, InP exhibits a low density of surface states when in contact with a deposited dielectric, which is needed for the operation of metal-insulator-semiconductor field effect transistors (MISFETs). The insulated gate of the MISFET results in a much lower gate leakage current as compared to the GaAs metal-semiconductor field effect transistors (MESFET). Due to the high input impedance of the MISFET, large positive biases can be applied to the gate, which results in charge accumulation and an increase in channel current without increasing the doping density of the channel region. Higher channel doping density could result in electron mobility degradation due to impurity scattering and lead to a deterioration of device performance. The insulated gate also results in a substantial increase in gate-source and gate-drain breakdown voltages.Many different gate insulators have been investigated on InP with varying degrees of success. Native oxides of InP grown by thermal oxidation, anodization, and plasma oxidation have been studied by several researchers (3). The main problem with the native oxide approach is the low resistivity of these insulators, which does not ...