Plasma damage reduction by using ISSG gate oxides

Cellere, G.; Valentini, Matteo; Caminati, M.; Vitali, M. E.; Moro, Arianna; Paccagnella, A.

doi:10.1109/ppid.2003.1200916

Cited by 3 publications

(3 citation statements)

References 8 publications

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“…Through gate patterning, in which etch stop on CG-Poly layer firstly, and then a thinner 3.0 nm of nitride (550 C deposition) deposited on the gate sidewall (SW) for preventing WSi x from extrusion. Afterwards, post ISSG of re-oxidation that is more tolerant to plasma-induced damage 10) was carried out at 900 C in a dry ambient with N 2 pre-annealing for plasma damage repair after CG-Poly, IPD, and FG-Poly dry etch where stop on GOX. In the case of the CG-Poly missing study, we used various methods such as (a) ISSG oxidation time reduction, (b) selective (lower oxidizing rate for SiN as compared with poly-Si surface) oxidation application, water vapor generator (WVG) which by catalytic reaction enhances the reactivity between hydrogen and oxygen to produce high-concentration water vapor, 11) and rapid thermal oxidation (RTO), 12) (c) thick SW nitride deposition, and (d) less stress WSi x film deposition.…”

Section: Methodsmentioning

confidence: 99%

Analysis of P-Doped Polycrystalline Silicon Missing of W-Polycide Gate for 2X nm NAND Flash

Chen¹,

Yang²,

Yin³

et al. 2013

Jpn. J. Appl. Phys.

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We studied the control-gate (CG-Poly) missing behavior after post in-situ steam generation (ISSG) re-oxidation for W-polycide gate of 2X nm NAND Flash and attempted to determine the possible mechanism. On the other hand, various effective countermeasures were also been proposed. We found that Si atoms diffuse upward on WSi2.3 films, driven out of the underlying doped polycrystalline silicon film during steam radical oxidation process based on energy dispersive X-ray (EDX) analysis. A 2.5 nm remaining of SiN at least on sidewall before oxidation results in CG-Poly missing free and WSi x deformation improvement simultaneously. A selective oxidation such as water vapor generator (WVG) and rapid thermal oxidation (RTO) can achieve the same efficient performance. Additionally, less intrinsic tensile stress of WSi x film employment also shows immunity against CG-Poly missing. Satisfactory sidewall barrier utilization for ISSG oxidation, diverse thermal oxidation selection, and even by WSi x film property modifying might avoid poly-Si missing occurrence and reduce the WSi x film deformation extent for the narrower dimension of 2X nm and beyond.

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Section: Methodsmentioning

confidence: 99%

Analysis of P-Doped Polycrystalline Silicon Missing of W-Polycide Gate for 2X nm NAND Flash

Chen¹,

Yang²,

Yin³

et al. 2013

Jpn. J. Appl. Phys.

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“…Another example of alleviating PID includes using protective diodes, which could shunt the plasma charging current away from sensitive circuits [13]. The introduction of In-Situ Steam Generation (ISSG) gate oxide reported improving its tolerance for plasma damage [14]. Furthermore, trimming the chamber and modifying PECVD-Ti deposition process were also found to alleviated plasma induced damage [15].…”

Section: Introductionmentioning

confidence: 99%

Wide range detector of plasma induced charging effect for advanced CMOS BEOL processes

Chao

Yang

et al. 2021

Nanoscale Res Lett

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“…Other example of alleviating PID includes the usage of protective diodes, which could shunt the plasma charging current away from sensitive circuits [13]. The introduction of In-Situ Steam Generation (ISSG) gate oxide reported to improve its tolerance for plasma damage [14]. Furthermore, trimming the chamber and modifying PECVD-Ti deposition process were also found to alleviated plasma induced damage [15].…”

Section: Introductionmentioning

confidence: 99%

Wide Range Detector of Plasma Induced Charging Effect for Advanced CMOS BEOL Processes

Chao

Yang

et al. 2020

Preprint

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Plasma damage reduction by using ISSG gate oxides

Cited by 3 publications

References 8 publications

Analysis of P-Doped Polycrystalline Silicon Missing of W-Polycide Gate for 2X nm NAND Flash

Analysis of P-Doped Polycrystalline Silicon Missing of W-Polycide Gate for 2X nm NAND Flash

Wide range detector of plasma induced charging effect for advanced CMOS BEOL processes

Wide Range Detector of Plasma Induced Charging Effect for Advanced CMOS BEOL Processes

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