Placement and routing method for analogue layout generation using modified cuckoo optimisation algorithm

Anisheh, Seyed Mahmoud; Shamsi, Hossein

doi:10.1049/iet-cds.2017.0111

Cited by 5 publications

(11 citation statements)

References 34 publications

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“…In this The Pareto optimal fronts (POFs) of the three-stage opamp including ST versus P diss , DC-Gain versus P diss , SR versus P diss and UGBW versus PM are shown in Figure 8. As can be seen from the Figure 8.a, the proposed method can achieve better ST compared to the existing methods [14], [31]. Table 2 reports the comparisons of post-layout simulation results of the proposed method with the ex-isting methods.…”

Section: Three-stage Amplifiermentioning

confidence: 94%

“…f oR3 (x) is the number of bends in the wire and it is defined to avoid unnecessary change of direction between adjacent segments. It is worth to mention that it is not considered in the Ref [31]. Current-density to determine the segment width and design rules are the constraints in the routing stage.…”

Section: Routingmentioning

confidence: 99%

“…The main advantage of the proposed method compared with the existing methods is that the sizing stage is not considered in the existing methods. In addition, a set of solutions are provided by MOEA/D in the proposed method compared to the single solution in the [31]. In the [31], area utilization and number of bends are not included for the placement and routing stages, respectively.…”

Section: Three-stage Amplifiermentioning

confidence: 99%

“…In addition, a set of solutions are provided by MOEA/D in the proposed method compared to the single solution in the [31]. In the [31], area utilization and number of bends are not included for the placement and routing stages, respectively. It is essential to define initial wires and some operators for the routing stage in the [14].…”

Section: Three-stage Amplifiermentioning

confidence: 99%

“…A parasitic-aware sizing method is suggested in Ref [30], This method is only applicable to a pre-defined floorplan. A placement and routing method for analog layout generation based on a modified cuckoo optimization algorithm (MCOA) is introduced in Ref [31] In this method, layout parasitics are considered to avoid performance deterioration. But, the placement and routing stages have some shortcomings as it will be discussed in this paper.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

A Placement and Routing Method for Layout Generation of CMOS Operational Amplifiers Using Multi-Objective Evolutionary Algorithm Based on Decomposition

2021

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This paper presents a new placement and routing method for layout generation of CMOS operational amplifiers (op-amps). Both circuit sizing and layout generation stages are performed automatically. In the proposed method, layout effects are considered during the layout generation. Layout parasitics and geometry information are extracted from a new automated layout generator. In this method, the multi-objective evolutionary algorithm based on decomposition (MOEA/D) is used as an optimization algorithm. In order to verify the performance of the proposed method, the design of three-stage operational amplifier (op-amp) and two-stage class-AB operational trans-conductance amplifier (OTA) in a 0.18µm process CMOS technology with 1.8 V supply voltage are presented. The simulation results indicate the efficiency of the proposed analog layout generation method.

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Section: Three-stage Amplifiermentioning

confidence: 94%

Section: Routingmentioning

confidence: 99%

Section: Three-stage Amplifiermentioning

confidence: 99%

Section: Three-stage Amplifiermentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A Placement and Routing Method for Layout Generation of CMOS Operational Amplifiers Using Multi-Objective Evolutionary Algorithm Based on Decomposition

2021

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Online multi‐object tracking based on time and frequency domain features

Nazarloo

Tabari

Motameni

2021

IET Computers & Digital Tech

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Multi-object tracking (MOT) can be considered as an interesting field in computer vision research. Its application can be found in video motion analysis, smart interfaces, and visual surveillance. It is a challenging issue due to difficulties made by a variable number of objects and interaction between them. In this work, a new method for online MOT based on time and frequency domain features is presented. The features are obtained from the wavelet transform and fractal dimension. The modified cuckoo optimization algorithm is utilized for feature selection, which has the ability such as fast convergence and global optima finding. The features are given for learning vector quantization, which is a supervised artificial neural network (ANN). It is used to classify the dataset. To evaluate the performance of the presented technique, simulations are performed using the ETH Mobile Platform and VS-PETS 2009 datasets. The simulation results show the superiority of the presented technique for MOT compared to earlier studies in terms of accuracy. The mostly tracked values for the datasets are 74.3% and 97.2%, which leads to at least 4.2% and 2.5% better performance according to the other methods, respectively. K E Y W O R D S fractal dimension, learning vector quantization, modified cuckoo optimization algorithm, multi-object tracking, time and frequency domain features, wavelet transform This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

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A four‐stage yield optimization technique for analog integrated circuits using optimal computing budget allocation and evolutionary algorithms

Yaseri

Maghami

Radmehr

2022

IET Computers & Digital Tech

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A high yield estimation is necessary for designing analogue integrated circuits. In the Monte‐Carlo (MC) method, many transistor‐level simulations should be performed to obtain the desired result. Therefore, some methods are needed to be combined with MC simulations to reach high yield with high speed at the same time. In this paper, a four‐stage yield optimisation approach is presented, which employs computational intelligence to accelerate yield estimation without losing accuracy. Firstly, the designs that met the desired characteristics are provided using critical analysis (CA). The aim of utilising CA is to avoid unnecessary MC simulations repeating for non‐critical solutions. Then in the second and third stages, the shuffled frog‐leaping algorithm and the Non‐dominated Sorting Genetic Algorithm‐III are proposed to improve the performance. Finally, MC simulations are performed to present the final result. The yield value obtained from the simulation results for two‐stage class‐AB Operational Transconductance Amplifer (OTA) in 180 nm Complementary Metal‐Oxide‐Semiconductor (CMOS) technology is 99.85%. The proposed method has less computational effort and high accuracy than the MC‐based approaches. Another advantage of using CA is that the initial population of multi‐objective optimisation algorithms will no longer be random. Simulation results prove the efficiency of the proposed technique.

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Placement and routing method for analogue layout generation using modified cuckoo optimisation algorithm

Cited by 5 publications

References 34 publications

A Placement and Routing Method for Layout Generation of CMOS Operational Amplifiers Using Multi-Objective Evolutionary Algorithm Based on Decomposition

A Placement and Routing Method for Layout Generation of CMOS Operational Amplifiers Using Multi-Objective Evolutionary Algorithm Based on Decomposition

Online multi‐object tracking based on time and frequency domain features

A four‐stage yield optimization technique for analog integrated circuits using optimal computing budget allocation and evolutionary algorithms

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