Physics-Based Single-Piece Charge Model for Strained-Si MOSFETs

Chandrasekaran, K.; Zhou, Xing; Chiah, Siau Ben; Shangguan, W. Z.; See, Guan Huei

doi:10.1109/ted.2005.850611

Cited by 19 publications

(18 citation statements)

References 10 publications

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“…It is observed that V th also reduces slightly with increase in S/D junction depth, for the same gate length. This is because of the increase in average vertical depletion region depth (11) and (12), and lower effective doping (10) due increased gate-S/D sharing and overlap of the lateral source-body and drain-body depletion regions. Thus, a lower S/D junction depth is desirable for better performance.…”

Section: Resultsmentioning

confidence: 99%

“…It can be seen that in the case of large channel length, i.e., L 2x dl , (11) reduces to x d ≈ x dν . Also, for extremely shortchannel lengths, i.e., L 2x dl , (12) reduces to x d ≈ r j + x dl . These results are along expected lines.…”

Section: Effect Of Strainmentioning

confidence: 99%

“…Earlier works on the threshold voltage of strained-Si/SiGe MOSFETs [10], [11] have concentrated on the band offsets due to strain and modified the long-channel threshold voltage model. One-dimensional Poisson equation solution has also been considered [12], [13]; however for short-channel devices, 2-D effects such as the influence of source/drain (S/D) depletion widths becomes important. The aim of this paper is, therefore, to study the impact of strain on the threshold voltage of short-channel (sub 100 nm) nanoscale strained-Si/SiGe MOSFETs by solving the 2-D Poisson equation in the strained-Si thin film and analyzing the dependence of threshold voltage on various device parameters such as strain (Ge mole fraction in SiGe), gate length, junction depth, etc.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Impact of Strain or Ge Content on the Threshold Voltage of Nanoscale Strained-Si/SiGe Bulk MOSFETs

Kumar

Venkataraman

Nawal

2007

IEEE Trans. Device Mater. Relib.

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The impact of strain on the threshold voltage of nanoscale strained-Si/SiGe MOSFETs is studied by developing a compact analytical model. Our model includes the effects of strain (Ge mole fraction in SiGe substrate), short-channel length, source/drain junction depths, substrate (body) doping, strained silicon thin-film thickness, gate work function, and other device parameters. The model correctly predicts a decrease in threshold voltage with increasing strain in the silicon thin film, i.e., with increasing Ge concentration in SiGe substrate. The accuracy of the results obtained using our analytical model is verified using two-dimensional device simulations.

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Section: Resultsmentioning

confidence: 99%

Section: Effect Of Strainmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Impact of Strain or Ge Content on the Threshold Voltage of Nanoscale Strained-Si/SiGe Bulk MOSFETs

Kumar

Venkataraman

Nawal

2007

IEEE Trans. Device Mater. Relib.

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“…He also developed models for the poly-accumulation effect (PAE), PDE, and poly-inversion effect (PIE) [21], as well as the QME [19] in the non-pinned φ s -based URM, which has been extended to the current Xsim model. Chandrasekaran [7] extended the regional φ s -based model to strained-Si heterostructure MOSFETs [22][23][24][25], further demonstrating the power of the URM approach. He also started regional φ s -based modeling with symmetric charge linearization for doped-body DG FinFETs [26], and introduced the idea of the effective drain-source voltage (V ds,eff ) with the "G-ref" [7].…”

Section: Xsim: Unification Of Mos Compact Modelsmentioning

confidence: 99%

Unification of MOS compact models with the unified regional modeling approach

Zhou

Zhu²,

See

et al. 2011

J Comput Electron

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This paper reviews the development of the MOS-FET model (Xsim), for unification of various types of MOS devices, such as bulk, partially/fully-depleted SOI, doublegate (DG) FinFETs and gate-all-around (GAA) siliconnanowires (SiNWs), based on the unified regional modeling (URM) approach. The complete scaling of body doping and thickness with seamless transitions from one structure to another is achieved with the unified regional surface potential, in which other effects (such as those due to poly-gate doping and quantum-mechanical) can be incorporated. The unique features of the Xsim model and the essence of the URM approach are described.

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“…The URM approach has also been extended to model future devices, such as strained-Si [38] and DG MOSFETs [11,39,40]. In this work, common-gate asymmetric double-gate model will be discussed in detail.…”

Section: Introduction To the Unified Regional Modeling Approachmentioning

confidence: 99%

Scalable compact modeling for nanometer CMOS technology

See¹

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This thesis documents the compact model developed for bulk MOSFET and doublegate MOSFET. The unified regional modeling approach is used in the physics-based scalable model development for bulk and double-gate MOSFETs. Surface potential models are developed regionally in accumulation, weak accumulation, depletion, volume and strong inversion regions, which are subsequently combined using interpolation functions to ensure smooth higher order derivatives. New unified regional-based short-channel effects are developed to improve the physical scalability of the charge model. A new concept that defines two separate saturation voltages at source and drain, referenced to bulk (or ground for double-gate), respectively, is introduced to meet the Gummel symmetry requirement and to allow possible extension to asymmetric source/drain devices within the same core model. A novel approach to unifying compact models for different non-classical MOS structures, such as ultra-thin body SOI and symmetric/asymmetric double-gate MOSFETs, is proposed. Explicit surface and zero-field potentials for common-gate asymmetric double-gate MOSFETs are solved regionally and the unified solutions are applied in the explicit drain-current model for double-gate MOSFETs. Explicit surface potentials for double-gate MOSFET with quantum mechanical correction are also developed. The research demonstrates a closer step towards the unification of MOS models for future generation non-classical MOS devices.

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Physics-Based Single-Piece Charge Model for Strained-Si MOSFETs

Cited by 19 publications

References 10 publications

Impact of Strain or Ge Content on the Threshold Voltage of Nanoscale Strained-Si/SiGe Bulk MOSFETs

Impact of Strain or Ge Content on the Threshold Voltage of Nanoscale Strained-Si/SiGe Bulk MOSFETs

Unification of MOS compact models with the unified regional modeling approach

Scalable compact modeling for nanometer CMOS technology

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